index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
amd
/
amdmct
/
mct
Age
Commit message (
Expand
)
Author
2014-01-28
x86: add common definitions for control registers
Aaron Durbin
2013-06-03
northbridge/amd/amdmct: Use `static const` instead of `const static`
Paul Menzel
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-03-02
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
Marc Jones
2011-06-03
This patch sets max freq defaults for ddr2 and ddr3for fam10.
Marc Jones
2011-03-28
Add AMD C32 support.
Zheng Bao
2011-01-06
Fix some settings fo AMD MCT. It is based on BIOS test suite.
Zheng Bao
2010-12-02
More explicite and straight way to set seed.
Zheng Bao
2010-10-13
Trivial. Clean up code and add some comments.
Zheng Bao
2010-10-09
Trivial. Spell checking.
Zheng Bao
2010-10-09
Trivial. Spell checking.
Zheng Bao
2010-10-08
Trivial. Spell checking.
Zheng Bao
2010-10-08
Trivial. Fix the typo.
Zheng Bao
2010-10-01
Trivial. Re-indent the code.
Zheng Bao
2010-09-28
Trivial. re-Indent the code.
Zheng Bao
2010-09-27
Obviously missing brackets.
Xavi Drudis Ferran
2010-09-21
Complete the code which was missing.
Zheng Bao
2010-09-09
Please find appended. This patch gets rid of the %gs magic altogether,
Arne Georg Gleditsch
2010-09-09
Also improve boot time on AMD for the DDR3 code path.
Arne Georg Gleditsch
2010-09-09
Apparently, it's not crucial to clear this at the exact moment we switch
Arne Georg Gleditsch
2010-09-04
AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.
Kerry She
2010-08-30
Multi-DIMMS on AMD ddr2 MCT channel B fixed.
Kerry She
2010-07-08
Fix all warnings in the tree
Stefan Reinauer
2010-07-08
get rid of even more fam10 and k8 warnings.
Stefan Reinauer
2010-05-09
Move includes to where they are needed. This allows to simplify
Patrick Georgi
2010-04-30
Get rid of a few more warnings.
Myles Watson
2010-04-27
Since some people disapprove of white space cleanups mixed in regular commits
Stefan Reinauer
2010-04-16
zero warnings days: unify mp tables. fix warnings.
Stefan Reinauer
2010-04-15
Remove a few more warnings from fam10.
Myles Watson
2010-04-14
fix a case where the fam10 code would overwrite parts of a struct.
Stefan Reinauer
2010-04-14
HWHoleSz must be u32...
Stefan Reinauer
2010-04-09
zero warnings days.
Stefan Reinauer
2010-04-08
Cosmetically make init_cpus more similar for fam10 and K8.
Myles Watson
2010-03-22
printk_foo -> printk(BIOS_FOO, ...)
Stefan Reinauer
2009-09-14
Use the coreboot pci config read/write functions instead of direct cf8/cfc
Marc Jones
2009-08-25
Without this patch, if we only got a DIMM in Channel B, memory can not be
Zheng Bao
2009-07-17
This is an obvious bug which I overlooked when I worked on the AM2r2
Zheng Bao
2009-07-01
Add AMD family 10 AM2r2 support.
Zheng Bao
2009-06-06
Fix for Erratum 350 for AMD Fam10h CPUs.
Marco Schmidt
2008-12-05
Fixes to AMD MCT code, found by Marco Schmidt <mschmidt@dspace.de>
Stefan Reinauer
2008-07-23
Memory initialization support for AMD Fam10 B3 (B0-B2 already supported).
Marc Jones
2008-04-25
Remove inline from FAM10 CPU initialization functions.
Marc Jones
2008-04-11
Bring Fam10 memory controller init up to date with the latest AMD BKDG
Marc Jones (marc.jones
2008-01-18
Rename almost all occurences of LinuxBIOS to coreboot.
Stefan Reinauer
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-12-19
Initial AMD Barcelona support for rev Bx.
Marc Jones
