diff options
| author | Zheng Bao <zheng.bao@amd.com> | 2010-10-01 06:27:35 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-10-01 06:27:35 +0000 |
| commit | 52000e1688e3b3f0c4cd62c4faa102737055d5e1 (patch) | |
| tree | 89c7a4410d532fcb688de3224aa2f76ef2322cfe /src/northbridge/amd/amdmct/mct | |
| parent | 4292684e1aa74b06e6797014f6eaf4ee5d879fc1 (diff) | |
Trivial. Re-indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/mct')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctchi_d.c | 6 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctsrc.c | 6 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mcttmrl.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctchi_d.c b/src/northbridge/amd/amdmct/mct/mctchi_d.c index ec6aa96c31..59705067bd 100644 --- a/src/northbridge/amd/amdmct/mct/mctchi_d.c +++ b/src/northbridge/amd/amdmct/mct/mctchi_d.c @@ -65,9 +65,9 @@ void InterleaveChannels_D(struct MCTStatStruc *pMCTstat, DramBase = pDCTstat->NodeSysBase >> 8; dct1_size = ((pDCTstat->NodeSysLimit) + 2) >> 8; dct0_size = Get_NB32(pDCTstat->dev_dct, 0x114); - if (dct0_size >= 0x10000) { - dct0_size -= HoleSize; - } + if (dct0_size >= 0x10000) { + dct0_size -= HoleSize; + } dct0_size -= DramBase; dct1_size -= dct0_size; diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index 0c2a08f8ce..e761a05eb5 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -961,7 +961,7 @@ static void CalcEccDQSRcvrEn_D(struct MCTStatStruc *pMCTstat, val += val0; } - pDCTstat->CH_D_BC_RCVRDLY[Channel][ChipSel>>1] = val; + pDCTstat->CH_D_BC_RCVRDLY[Channel][ChipSel>>1] = val; } } SetEccDQSRcvrEn_D(pDCTstat, Channel); @@ -979,8 +979,8 @@ void mctSetEccDQSRcvrEn_D(struct MCTStatStruc *pMCTstat, if (!pDCTstat->NodePresent) break; if (pDCTstat->DCTSysLimit) { - for(i=0; i<2; i++) - CalcEccDQSRcvrEn_D(pMCTstat, pDCTstat, i); + for(i=0; i<2; i++) + CalcEccDQSRcvrEn_D(pMCTstat, pDCTstat, i); } } } diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index 4f26c011dc..ce23f69b24 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -220,8 +220,8 @@ static void mct_setMaxRdLatTrnVal_D(struct DCTStatStruc *pDCTstat, if (pDCTstat->GangedMode) { Channel = 0; // for safe - for (i=0; i<2; i++) - pDCTstat->CH_MaxRdLat[i] = MaxRdLatVal; + for (i=0; i<2; i++) + pDCTstat->CH_MaxRdLat[i] = MaxRdLatVal; } else { pDCTstat->CH_MaxRdLat[Channel] = MaxRdLatVal; } |