diff options
| author | Marco Schmidt <mashpb@gmail.com> | 2009-06-06 11:33:58 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-06-06 11:33:58 +0000 |
| commit | a774192e22433938d527764531d81a37f985a8f2 (patch) | |
| tree | ce612e72ab0a4d09406c70142ef09e99d13be97a /src/northbridge/amd/amdmct/mct | |
| parent | c263b4471dd42895b409652b3f3567fcb5cdaae1 (diff) | |
Fix for Erratum 350 for AMD Fam10h CPUs.
Compared to posted patch, there are whitespace fixes
(request by Uwe), and a guard to run the erratum only
on AMD_RB_C2 (request by Marc).
Signed-off-by: Marco Schmidt <mashpb@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/mct')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index cec708c2b1..105ae662b8 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -356,7 +356,7 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat, phyAssistedMemFnceTraining(pMCTstat, pDCTstatA); if (nv_DQSTrainCTL) { - mctHookBeforeAnyTraining(); + mctHookBeforeAnyTraining(pMCTstat, pDCTstatA); print_t("DQSTiming_D: TrainReceiverEn_D FirstPass:\n"); TrainReceiverEn_D(pMCTstat, pDCTstatA, FirstPass); |