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path: root/src/northbridge/amd/amdmct/mct
AgeCommit message (Expand)Author
2015-02-15northbridge/amd/amdmct: Fix FTBFS with node interleaving enabledTimothy Pearson
2015-01-06northbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
2014-07-08northbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-05-23northbridge/amd/amdmct: Superfluous parenthesis in if-statementsEdward O'Callaghan
2014-05-22northbridge/amd/amdmct/mct: Initialize variables at the eolEdward O'Callaghan
2014-01-28x86: add common definitions for control registersAaron Durbin
2013-06-03northbridge/amd/amdmct: Use `static const` instead of `const static`Paul Menzel
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-03-02Fix ECC disable option for AMD Fam10 DDR2 and DDR3.Marc Jones
2011-06-03This patch sets max freq defaults for ddr2 and ddr3for fam10.Marc Jones
2011-03-28Add AMD C32 support.Zheng Bao
2011-01-06Fix some settings fo AMD MCT. It is based on BIOS test suite.Zheng Bao
2010-12-02More explicite and straight way to set seed.Zheng Bao
2010-10-13Trivial. Clean up code and add some comments.Zheng Bao
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Fix the typo.Zheng Bao
2010-10-01Trivial. Re-indent the code.Zheng Bao
2010-09-28Trivial. re-Indent the code.Zheng Bao
2010-09-27Obviously missing brackets.Xavi Drudis Ferran
2010-09-21Complete the code which was missing.Zheng Bao
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Also improve boot time on AMD for the DDR3 code path.Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-04AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.Kerry She
2010-08-30Multi-DIMMS on AMD ddr2 MCT channel B fixed.Kerry She
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-05-09Move includes to where they are needed. This allows to simplifyPatrick Georgi
2010-04-30Get rid of a few more warnings.Myles Watson
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-04-16zero warnings days: unify mp tables. fix warnings.Stefan Reinauer
2010-04-15Remove a few more warnings from fam10.Myles Watson
2010-04-14fix a case where the fam10 code would overwrite parts of a struct.Stefan Reinauer
2010-04-14HWHoleSz must be u32...Stefan Reinauer
2010-04-09zero warnings days.Stefan Reinauer
2010-04-08Cosmetically make init_cpus more similar for fam10 and K8.Myles Watson
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
2009-09-14Use the coreboot pci config read/write functions instead of direct cf8/cfcMarc Jones
2009-08-25Without this patch, if we only got a DIMM in Channel B, memory can not beZheng Bao
2009-07-17This is an obvious bug which I overlooked when I worked on the AM2r2Zheng Bao
2009-07-01Add AMD family 10 AM2r2 support.Zheng Bao
2009-06-06Fix for Erratum 350 for AMD Fam10h CPUs.Marco Schmidt
2008-12-05Fixes to AMD MCT code, found by Marco Schmidt <mschmidt@dspace.de>Stefan Reinauer
2008-07-23Memory initialization support for AMD Fam10 B3 (B0-B2 already supported).Marc Jones
2008-04-25Remove inline from FAM10 CPU initialization functions.Marc Jones
2008-04-11Bring Fam10 memory controller init up to date with the latest AMD BKDGMarc Jones (marc.jones
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-12-19Initial AMD Barcelona support for rev Bx.Marc Jones
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