| Age | Commit message (Expand) | Author |
|---|
| 2021-01-12 | soc/intel: rename uart_max_index | Michael Niewöhner |
| 2021-01-12 | soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE` | Angel Pons |
| 2021-01-12 | soc/intel/common/pcie: Add helper function for getting mask of enabled ports | Furquan Shaikh |
| 2021-01-12 | soc/intel/alderlake: Add PCH ID 0x5182 | Subrata Banik |
| 2021-01-11 | soc/intel/{icl,tgl,jsl,ehl}: add LPIT support | Michael Niewöhner |
| 2021-01-11 | soc/intel/skl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
| 2021-01-11 | soc/intel/cnl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
| 2021-01-11 | acpi,soc/intel/common: add support for Intel Low Power Idle Table | Michael Niewöhner |
| 2021-01-11 | {soc,vc,mb}/intel: Drop support for Cannon Lake SoC | Felix Singer |
| 2021-01-11 | soc/intel/common/uart: Use simple(_s_) variants of PCI functions | Furquan Shaikh |
| 2021-01-11 | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh |
| 2021-01-11 | soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-S | Jeremy Soller |
| 2021-01-11 | soc/intel/cannonlake: Enable wake from USB in S4 | Patrick Rudolph |
| 2021-01-10 | soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs | Subrata Banik |
| 2021-01-10 | soc/intel/broadwell: Use `mp_cpu_bus_init` | Angel Pons |
| 2021-01-10 | mb/google/cyan: Move board_id() to mainboard_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Add missing include in nvs.h | Kyösti Mälkki |
| 2021-01-10 | soc/intel: Rename to soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | soc/intel: Replace acpi_init_gnvs() | Kyösti Mälkki |
| 2021-01-10 | mb/x/acpi_tables: Rename to mainboard_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | sb/intel: Factor out soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Replace uses of CBMEM_ID_ACPI_GNVS | Kyösti Mälkki |
| 2021-01-10 | soc/intel/braswell: Refactor acpi_init_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant ChromeOS setup for GNVS | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations | Kyösti Mälkki |
| 2021-01-08 | soc/intel/common/uart: Restrict scope of uart_common_init to uart.c | Furquan Shaikh |
| 2021-01-08 | soc/intel/common: Pass in pci_devfn_t into lpss_set_power_state | Furquan Shaikh |
| 2021-01-08 | soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range() | Furquan Shaikh |
| 2021-01-08 | soc/intel/tigerlake: Enable USB2 port reset message on Type-C ports | John Zhao |
| 2021-01-08 | */Makefile.inc: Add some INTERMEDIATE targets to .PHONY | Arthur Heymans |
| 2021-01-08 | soc/intel/jasperlake: Update acoustic noise related parameters | Maulik V Vaghela |
| 2021-01-08 | soc/intel/jasperlake: Enable USB2 PHY SUS PG for s0ix qualification | Krishna Prasad Bhat |
| 2021-01-07 | ACPI: Remove ACPI_NO_SMI_GNVS | Kyösti Mälkki |
| 2021-01-07 | arch/x86: Move prologue to .init section | Kyösti Mälkki |
| 2021-01-07 | soc/intel/icelake: Remove unused ENABLE_DISPLAY_OVER_EXT_PCIE_GFX | Subrata Banik |
| 2021-01-07 | soc/intel/common/cse: Drop dependency on CHROMEOS for SOC_INTEL_CSE_LITE_SKU | Matt DeVillier |
| 2021-01-06 | soc/intel/broadwell: Move MAX_CPUS from mb to SoC | Felix Singer |
| 2021-01-06 | soc/intel/skylake: Move MAX_CPUS from mb to SoC | Felix Singer |
| 2021-01-06 | soc/intel/alderlake: Update CPU microcode patch base address/size | Subrata Banik |
| 2021-01-04 | arch/x86: Pass GNVS as parameter to SMM module | Kyösti Mälkki |
| 2021-01-04 | soc/intel/baytrail/southcluster.asl: Use consistent comment formatting | Matt DeVillier |
| 2021-01-04 | soc/intel/baytrail: add LPEA resources to southcluster.asl | Matt DeVillier |
| 2021-01-04 | soc/intel/apollolake: Hook up GMA ACPI brightness controls | Matt DeVillier |
| 2021-01-03 | soc/intel: Drop indirect <soc/nvs.h> include | Kyösti Mälkki |
| 2021-01-03 | soc/intel: Replace <soc/nvs.h> with <soc/device_nvs.h> | Kyösti Mälkki |
| 2021-01-03 | sb,soc/intel: Convert some CONFIG(CHROMEOS) preprocessor | Kyösti Mälkki |
| 2021-01-01 | soc/intel/cnl: add panel and backlight configuration code | Michael Niewöhner |
| 2021-01-01 | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner |
| 2021-01-01 | soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation | Michael Niewöhner |
| 2020-12-31 | soc/intel/skylake: Remove device_nvs.h | Kyösti Mälkki |
| 2020-12-30 | drivers/intel/gma: Include gfx.asl by default for all platforms... | Matt DeVillier |
| 2020-12-30 | soc/intel/common: Move gfx.asl to drivers/intel/gma | Matt DeVillier |
| 2020-12-30 | soc/intel/cnl: add Kconfig values for GMA backlight registers | Michael Niewöhner |
| 2020-12-30 | soc/intel: hook up new gpio device in the soc chips | Michael Niewöhner |
| 2020-12-29 | soc/intel/bdw,nb/intel/hsw: correct mask for panel power cycle delay | Michael Niewöhner |
| 2020-12-29 | soc/intel/alderlake: Update chipset.cb for TCSS and USB | Eric Lai |
| 2020-12-29 | soc/intel/skylake: Add 4 missing root ports to chipset dt | Felix Singer |
| 2020-12-29 | sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable | Arthur Heymans |
| 2020-12-28 | soc/intel/apl: Fix indents | Felix Singer |
| 2020-12-28 | soc/intel/xeon_sp: Lock PAM and SMRAM registers | Arthur Heymans |
| 2020-12-28 | soc/intel/xeon_sp: Lock down IIO DFX Global registers | Arthur Heymans |
| 2020-12-28 | soc/intel/xeon_sp: Lock down DMI3 PCI registers | Arthur Heymans |
| 2020-12-28 | kconfig: remove non-existent source | Jack Rosenthal |
| 2020-12-28 | soc/intel/skylake: Enable CHAP device depending on devicetree | Benjamin Doron |
| 2020-12-25 | ACPI: Fix some GNVS field comments | Kyösti Mälkki |
| 2020-12-25 | sb,soc/intel: Fix GNVS OperationRegion | Kyösti Mälkki |
| 2020-12-25 | soc/intel/common/gfx: rename and guard graphics_soc_init() | Matt DeVillier |
| 2020-12-24 | soc/intel/xeon_sp/cpx: Disable isoch operation for performance | Johnny Lin |
| 2020-12-23 | soc/intel/common: Remove unused SOC_INTEL_COMMON_ACPI | Marc Jones |
| 2020-12-23 | src/soc/intel/xeon_sp/acpi.c: Remove unnecessary .h | Marc Jones |
| 2020-12-23 | soc/intel/alderlake: Enable support for extended BIOS window | Subrata Banik |
| 2020-12-23 | soc/intel/alderlake: Add SPI DMI Destination ID | Subrata Banik |
| 2020-12-22 | soc/intel/common: Fix XHCI elog driver | Tim Wawrzynczak |
| 2020-12-22 | soc/intel/common/block/acpi: Fix get_cores_per_package | Patrick Rudolph |
| 2020-12-22 | soc/intel/cannonlake: Add Iccmax and loadlines for CML-S | Gaggery Tsai |
| 2020-12-22 | soc/intel/apl/graphics: add missing left-shift | Michael Niewöhner |
| 2020-12-22 | sb,soc/intel: Drop unnecessary headers | Kyösti Mälkki |
| 2020-12-22 | soc/intel/xeon_sp: Use common block ACPI | Marc Jones |
| 2020-12-21 | soc/intel/xeon_sp/skx: Properly set up MTRR's | Arthur Heymans |
| 2020-12-21 | soc/intel/xeon_sp: Fix compiling with CONFIG_DEBUG_RESOURCES | Arthur Heymans |
| 2020-12-21 | soc/intel/common/block/acpi: Add soc MADT IOAPIC hook | Marc Jones |
| 2020-12-21 | soc/intel/common/block/acpi: Make calculate_power() global | Marc Jones |
| 2020-12-17 | azalia: Use `azalia_enter_reset` function | Angel Pons |
| 2020-12-17 | soc/intel/common/hda_verb.c: Clarify mask usage | Angel Pons |
| 2020-12-17 | soc/intel/skylake: Drop duplicate PmConfigPciClockRun configuration | Benjamin Doron |
| 2020-12-17 | azalia: Use `azalia_exit_reset` function | Angel Pons |
| 2020-12-17 | azalia: Replace `hda_find_verb` uses | Angel Pons |
| 2020-12-17 | azalia: Make `set_bits` function non-static | Angel Pons |
| 2020-12-17 | soc/intel/cannonlake: Change mainboard_silicon_init_params argument | Patrick Rudolph |
| 2020-12-16 | soc/intel/xeon_sp: Move DMICTL lock | Arthur Heymans |
| 2020-12-16 | soc/intel/broadwell: Drop unnecessary `sa_dev` | Angel Pons |
| 2020-12-15 | soc/intel/xeon_sp: Fix final MTRR usage | Arthur Heymans |
| 2020-12-14 | src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL | Shreesh Chhabbi |
| 2020-12-14 | soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option | Shreesh Chhabbi |
| 2020-12-14 | soc/intel/tigerlake: Enable CSE Lite driver for TGL platform in romstage | Sridhar Siricilla |
| 2020-12-14 | soc/intel/jasperlake: Enables CSE Lite driver for JSL platform in the romstage | Sridhar Siricilla |
| 2020-12-14 | soc/intel/common: Move CSE Lite driver functionality into romstage | Sridhar Siricilla |
| 2020-12-14 | soc/inte/common: Replace #if macro with if C-language constuct | Sridhar Siricilla |
| 2020-12-14 | soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP | Sridhar Siricilla |
