ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations

Allocation now happens prior to device enumeration. The
step cbmem_add() is a no-op here, if reached for some
boards. The memset() here is also redundant and becomes
harmful with followup works, as it would wipe out the
CBMEM console and ChromeOS related fields without them
being set again.

Change-Id: I9b2625af15cae90b9c1eb601e606d0430336609f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48701
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

13 files changed, 23 insertions, 78 deletions

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index d0e7a73a3f..61d42a5407 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -77,8 +77,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs)
 	struct soc_intel_apollolake_config *cfg;
 	cfg = config_of_soc();
 
-	/* Clear out GNVS. */
-	memset(gnvs, 0, sizeof(*gnvs));
 
 	if (CONFIG(CONSOLE_CBMEM))
 		gnvs->cbmc = (uintptr_t) cbmem_find(CBMEM_ID_CONSOLE);
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index fdbeef2d88..9670a31eba 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -28,7 +28,6 @@
 #include <soc/intel/common/vbt.h>
 #include <soc/iomap.h>
 #include <soc/itss.h>
-#include <soc/nvs.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/systemagent.h>
@@ -318,9 +317,6 @@ static void soc_init(void *data)
 	 */
 	p2sb_unhide();
 
-	/* Allocate ACPI NVS in CBMEM */
-	cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
-
 	if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) {
 		printk(BIOS_INFO, "Skip setting RAPL per configuration\n");
 	} else {
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index b15970e7b3..e199e9fc59 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -2,6 +2,7 @@
 
 #include <arch/cpu.h>
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <cpu/intel/microcode.h>
@@ -143,15 +144,9 @@ static void s3_save_acpi_wake_source(struct global_nvs *gnvs)
 
 static void s3_resume_prepare(void)
 {
-	struct global_nvs *gnvs;
+	struct global_nvs *gnvs = acpi_get_gnvs();
 
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
-	if (gnvs == NULL)
-		return;
-
-	if (!acpi_is_wakeup_s3())
-		memset(gnvs, 0, sizeof(struct global_nvs));
-	else
+	if (gnvs && acpi_is_wakeup_s3())
 		s3_save_acpi_wake_source(gnvs);
 }
 
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 2df6410e64..d8305c612d 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -489,11 +489,6 @@ static void southcluster_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index c9df5268ef..3a82318839 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -382,11 +382,6 @@ void southcluster_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c
index eba15274dd..68bddfb9a9 100644
--- a/src/soc/intel/braswell/ramstage.c
+++ b/src/soc/intel/braswell/ramstage.c
@@ -2,6 +2,7 @@
 
 #include <arch/cpu.h>
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <cpu/intel/microcode.h>
@@ -135,24 +136,11 @@ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
 	return 1;
 }
 
-static void s3_resume_prepare(void)
-{
-	struct global_nvs *gnvs;
-
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
-	if (!acpi_is_wakeup_s3() && gnvs)
-		memset(gnvs, 0, sizeof(struct global_nvs));
-}
-
 static void set_board_id(void)
 {
-	struct global_nvs *gnvs;
-
-	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		printk(BIOS_ERR, "Unable to locate Global NVS\n");
+	struct global_nvs *gnvs = acpi_get_gnvs();
+	if (!gnvs)
 		return;
-	}
 	gnvs->bdid = board_id();
 }
 
@@ -165,9 +153,6 @@ void soc_init_pre_device(struct soc_intel_braswell_config *config)
 	/* Allow for SSE instructions to be executed. */
 	write_cr4(read_cr4() | CR4_OSFXSR | CR4_OSXMMEXCPT);
 
-	/* Indicate S3 resume to rest of ramstage. */
-	s3_resume_prepare();
-
 	/* Perform silicon specific init. */
 	intel_silicon_init();
 	set_max_freq();
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 5a29b02396..c735a819ce 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -593,8 +593,6 @@ static void pch_lpc_add_io_resources(struct device *dev)
 
 static void pch_lpc_read_resources(struct device *dev)
 {
-	struct global_nvs *gnvs;
-
 	/* Get the normal PCI resources of this device. */
 	pci_dev_read_resources(dev);
 
@@ -603,11 +601,6 @@ static void pch_lpc_read_resources(struct device *dev)
 
 	/* Add IO resources. */
 	pch_lpc_add_io_resources(dev);
-
-	/* Allocate ACPI NVS in CBMEM */
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
-	if (!acpi_is_wakeup_s3() && gnvs)
-		memset(gnvs, 0, sizeof(struct global_nvs));
 }
 
 static void southcluster_inject_dsdt(const struct device *device)
@@ -615,11 +608,6 @@ static void southcluster_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c
index 57abf95207..b4f38a5bfa 100644
--- a/src/soc/intel/broadwell/ramstage.c
+++ b/src/soc/intel/broadwell/ramstage.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
@@ -63,15 +64,9 @@ static void save_acpi_wake_source(struct global_nvs *gnvs)
 
 static void s3_resume_prepare(void)
 {
-	struct global_nvs *gnvs;
+	struct global_nvs *gnvs = acpi_get_gnvs();
 
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs));
-	if (gnvs == NULL)
-		return;
-
-	if (!acpi_is_wakeup_s3())
-		memset(gnvs, 0, sizeof(struct global_nvs));
-	else
+	if (gnvs && acpi_is_wakeup_s3())
 		save_acpi_wake_source(gnvs);
 }
 
diff --git a/src/soc/intel/common/Kconfig.common b/src/soc/intel/common/Kconfig.common
index b0fbf25545..f39571ee44 100644
--- a/src/soc/intel/common/Kconfig.common
+++ b/src/soc/intel/common/Kconfig.common
@@ -2,6 +2,7 @@ config SOC_INTEL_COMMON
 	bool
 	select AZALIA_PLUGIN_SUPPORT
 	select HAVE_DISPLAY_MTRRS
+	select ACPI_SOC_NVS
 	help
 	  common code for Intel SOCs
 
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 4a53c55902..fc4352834a 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <acpi/acpi_gnvs.h>
 #include <acpi/acpigen.h>
 #include <arch/cpu.h>
 #include <arch/ioapic.h>
@@ -7,7 +8,6 @@
 #include <bootstate.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
-#include <acpi/acpi_gnvs.h>
 #include <console/console.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/intel/common/common.h>
@@ -244,11 +244,6 @@ void southbridge_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 993338a961..e68e5dbeaa 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -251,11 +251,6 @@ void southcluster_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
diff --git a/src/soc/intel/quark/include/soc/nvs.h b/src/soc/intel/quark/include/soc/nvs.h
new file mode 100644
index 0000000000..904607ff35
--- /dev/null
+++ b/src/soc/intel/quark/include/soc/nvs.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_INTEL_QUARK_NVS_H
+#define SOC_INTEL_QUARK_NVS_H
+
+#include <stdint.h>
+
+struct __packed global_nvs {
+	uint32_t	cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
+};
+
+#endif /* SOC_INTEL_QUARK_NVS_H */
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 4272954a0a..6b90dc4092 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -545,11 +545,6 @@ void southbridge_inject_dsdt(const struct device *device)
 	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-		if (gnvs)
-			memset(gnvs, 0, sizeof(*gnvs));
-	}
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);