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authorJohn Zhao <john.zhao@intel.com>2021-01-01 14:19:36 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-08 08:22:47 +0000
commit4ead6b33671bba5f67f1cb0d6df5979b47e4ccc0 (patch)
tree3f9f760468fcc7d2af07f592b97b1139176e56c3 /src/soc/intel
parent81a4c344e7015666b047a05fc0ecb90ad9013d64 (diff)
soc/intel/tigerlake: Enable USB2 port reset message on Type-C ports
USB3 is in CPU and USB2 in PCH on Tigerlake. Cross die messaging is implemented between CPU and PCH through the IOSF SB bridge. a PCH xHCI USB2 port reset event issued by the xHCI driver shall trigger a message upstream to CPU to wake it from the low power state which allows a USB3 device that downgraded to USB2 to upgrade back to USB3. BUG=b:176575892 TEST=Built and booted to kernel on Voxel board. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I672f30a117980bc10bd71e9b77c5fa76286b9f5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/49052 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c3
-rw-r--r--src/soc/intel/tigerlake/include/soc/usb.h2
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index ed34897274..295f7896f2 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -159,6 +159,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->Usb2OverCurrentPin[i] = config->usb2_ports[i].ocpin;
else
params->Usb2OverCurrentPin[i] = 0xff;
+
+ if (config->usb2_ports[i].type_c)
+ params->PortResetMessageEnable[i] = 1;
}
for (i = 0; i < ARRAY_SIZE(config->usb3_ports); i++) {
diff --git a/src/soc/intel/tigerlake/include/soc/usb.h b/src/soc/intel/tigerlake/include/soc/usb.h
index 69b5ca89a7..5dea4bf52e 100644
--- a/src/soc/intel/tigerlake/include/soc/usb.h
+++ b/src/soc/intel/tigerlake/include/soc/usb.h
@@ -31,6 +31,7 @@ struct usb2_port_config {
uint8_t tx_emp_enable;
uint8_t pre_emp_bias;
uint8_t pre_emp_bit;
+ uint8_t type_c;
};
/* USB Overcurrent pins definition */
@@ -112,6 +113,7 @@ enum {
.tx_emp_enable = USB2_PRE_EMP_ON, \
.pre_emp_bias = USB2_BIAS_56P3MV, \
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \
+ .type_c = 1, \
}
struct usb3_port_config {