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path: root/src/northbridge/intel/sandybridge/raminit_common.c
AgeCommit message (Expand)Author
2021-01-06nb/intel/sandybridge: Use consistent comment styleAngel Pons
2021-01-06nb/intel/sandybridge: Define and use `QCLK_PI` constantAngel Pons
2021-01-04nb/intel/sandybridge: Replace memset with initializerAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-25nb/intel/sandybridge: Rewrite constant valuesAngel Pons
2020-12-23nb/intel/sandybridge: Always wait for IOSAV after starting itAngel Pons
2020-12-23nb/intel/sandybridge: Introduce `iosav_run_once_and_wait`Angel Pons
2020-12-23nb/intel/sandybridge: Remove unnecessary commentsAngel Pons
2020-12-23nb/intel/sandybridge: Print delays in decimalAngel Pons
2020-12-23nb/intel/sandybridge: Add comment to TC_RWP writeAngel Pons
2020-12-23nb/intel/sandybridge: Use proper names to refer to training stepsAngel Pons
2020-12-23nb/intel/sandybridge: Add comments about I/O and RT latencyAngel Pons
2020-12-23nb/intel/sandybridge: Rename I/O data timingsAngel Pons
2020-12-23nb/intel/sandybridge: Use bitfields for I/O data timingsAngel Pons
2020-12-23nb/intel/sandybridge: Compute data timings independentlyAngel Pons
2020-12-13nb/intel/sandybridge: Clean up program_timingsAngel Pons
2020-12-12nb/intel/sandybridge: Fix blunder in MR2 shadow codeAngel Pons
2020-11-22nb/intel/sandybridge: Rename and refactor `discover_timC_write`Angel Pons
2020-11-22nb/intel/sandybridge: Only use write Vref if supportedAngel Pons
2020-11-22nb/intel/sandybridge: Refine power-down mode logicAngel Pons
2020-11-22nb/intel/sandybridge: Lower tPRPDEN to 1Angel Pons
2020-11-22nb/intel/sandybridge: Increase tRWDRDD with fast RAMAngel Pons
2020-11-22nb/intel/sandybridge: Rename and clean up `discover_edges_write`Angel Pons
2020-11-22nb/intel/sandybridge: Relocate PREA-ACT-RD sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Remove spurious writes to IOSAV BW maskAngel Pons
2020-11-22nb/intel/sandybridge: Drop `precharge` functionAngel Pons
2020-11-22nb/intel/sandybridge: Clarify register writeAngel Pons
2020-11-22nb/intel/sandybridge: Encapsulate JEDEC write levelingAngel Pons
2020-11-22nb/intel/sandybridge: Do not rewrite write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Make helper for write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Rename `read_training` functionAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRTRAININGMOD registerAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRCMDPICODINGAngel Pons
2020-11-22nb/intel/sandybridge: Move constants out of for-loopAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfields to program MCMAIN timingsAngel Pons
2020-11-22nb/intel/sandybridge: Clean up TC_OTHP writesAngel Pons
2020-11-22nb/intel/sandybridge: Use one sequence for write levelingAngel Pons
2020-11-21nb/intel/sandybridge: Introduce `disable_refresh_machine` functionAngel Pons
2020-11-20nb/intel/sandybridge: Rename loop variableAngel Pons
2020-11-20nb/intel/sandybridge: Remove unnecessary per-rank loopsAngel Pons
2020-11-20nb/intel/sandybridge: Rename `discover_edges` functionsAngel Pons
2020-11-20nb/intel/sandybridge: Restore nominal Vref for current channelAngel Pons
2020-11-20nb/intel/sandybridge: Rename `timC_discovery` and relatedAngel Pons
2020-11-20nb/intel/sandybridge: Introduce `ddr3_mirror_mrreg` helperAngel Pons
2020-11-20nb/intel/sandybridge: Replace and-zero with assignmentAngel Pons
2020-11-20nb/intel/sandybridge: Introduce `find_predefined_pattern` functionAngel Pons
2020-11-20nb/intel/sandybridge: Rename receive enable functionsAngel Pons
2020-11-20nb/intel/sandybridge: Rework timA minmax codeAngel Pons
2020-11-19nb/intel/sandybridge: Correct some whitespace issuesAngel Pons
2020-11-19nb/intel/sandybridge: Clean up `dram_mr2` functionAngel Pons
2020-11-19nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAMAngel Pons
2020-11-19nb/intel/sandybridge: Program MR2 shadow registerAngel Pons
2020-11-19nb/intel/sandybridge: Drop unused `rank` parameterAngel Pons
2020-11-19nb/intel/sandybridge: Relocate `get_ODT` functionAngel Pons
2020-11-19nb/intel/sandybridge: Clean up MR0 compositionAngel Pons
2020-11-19nb/intel/sandybridge: Rewrite magic numbersAngel Pons
2020-11-19nb/intel/sandybridge: Create sequence helpersAngel Pons
2020-11-19nb/intel/sandybridge: Extract some IOSAV sequences into macrosAngel Pons
2020-11-19nb/intel/sandybridge: Use arrays to program IOSAVAngel Pons
2020-11-19nb/intel/sandybridge: Move IOSAV functions to separate fileAngel Pons
2020-11-16nb/intel/sandybridge: Clarify some parts of raminitAngel Pons
2020-11-16nb/intel/sandybridge: Fix typo in commentAngel Pons
2020-11-16nb/intel/sandybridge: Retype constantAngel Pons
2020-11-16nb/intel/sandybridge: Drop write_controller_mr() functionAngel Pons
2020-11-16nb/intel/sandybridge: Reduce the scope of get_CWL()Angel Pons
2020-11-16nb/intel/sandybridge: Clarify IOSAV_DATA_CTL_ch usageAngel Pons
2020-08-11nb/intel/sandybridge/raminit: Add commentsPatrick Rudolph
2020-08-11nb/intel/sandybridge/raminit: Fix ECC scrubPatrick Rudolph
2020-07-26nb/intel/sandybridge: Add missing includesElyes HAOUAS
2020-05-21nb/intel/sandybridge: Use the new IOSAV struct APIAngel Pons
2020-05-21nb/intel/sandybridge: Drop unused parametersAngel Pons
2020-05-21nb/intel/sandybridge: Redefine IOSAV_SUBSEQUENCEAngel Pons
2020-05-21nb/intel/sandybridge: Truncate IOSAV subseq gapsAngel Pons
2020-05-21nb/intel/sandybridge: Replace macros with functionsAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_RUN_ONCEAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE againAngel Pons
2020-05-18nb/intel/sandybridge: Use or-based logic for RANKSELAngel Pons
2020-05-18nb/intel/sandybridge: Program IOSAV with macrosAngel Pons
2020-05-18nb/intel/sandybridge: Add and use BROADCAST_CH for IOSAVAngel Pons
2020-05-12nb/intel/sandybridge: Reorder IOSAV writesAngel Pons
2020-05-12nb/intel/sandybridge: Reorder register writeAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-19nb/intel/sandybridge: Refactor get_mem_min_tckAngel Pons
2020-04-14nb/intel/sandybridge/raminit: Add ECC supportPatrick Rudolph
2020-04-14nb/intel/sandybridge/raminit: Add ECC detection supportPatrick Rudolph
2020-03-26nb/intel/sandybridge: Use macros for JEDEC commandsAngel Pons
2020-03-26nb/intel/sandybridge: Correct TC_DTP handlingAngel Pons
2020-03-26nb/intel/sandybridge: Add and use TC_DTP definitionAngel Pons
2020-03-26nb/intel/sandybridge: Use IOSAV_BYTE_SERROR_C_ch macroAngel Pons
2020-03-26nb/intel/sandybridge: Update commentAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Use cached CPUIDAngel Pons
2020-03-23nb/intel/sandybridge: Do not define tables in a headerAngel Pons
2020-03-22nb/intel/sandybridge: Drop spurious register writeAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-27nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE defineFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
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