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AgeCommit message (Expand)Author
2021-09-10soc/intel/jasperlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak
2021-09-10soc/intel/cannonlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak
2021-09-10soc/intel/cannonlake: Switch PMC to use device callbacksTim Wawrzynczak
2021-09-10soc/intel/tigerlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak
2021-09-10soc/intel/tigerlake: Move LPM functions to new fileTim Wawrzynczak
2021-09-10soc/intel/alderlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak
2021-09-10soc/intel/common/block/acpi: Add LPM requirements support to PEPD _DSMTim Wawrzynczak
2021-09-10soc/intel/common/block/acpi: Move pep.asl to acpigenTim Wawrzynczak
2021-09-10soc/intel/alderlake: Set LpmStateEnableMask UPDTim Wawrzynczak
2021-09-10soc/intel/alderlake: Add get_adl_cpu_type functionTim Wawrzynczak
2021-09-09soc/intel/alderlake: Change VBOOT_HASH_BLOCK_SIZE to 4 KiBMAULIK V VAGHELA
2021-09-09soc/intel/alderlake: Enable Irms UPD for ADLRonak Kanabar
2021-09-09mb/ocp: Remove superfluous FSP header CPP inclusionArthur Heymans
2021-09-09intel/xeon_sp/cpx: Hook up public microcode releaseArthur Heymans
2021-09-09soc/intel/broadwell: Set FADT `duty_offset` to 0Angel Pons
2021-09-08soc/intel/common: Avoid NULL pointer deferenceJohn Zhao
2021-09-08cpu/x86/tsc: Deduplicate Makefile logicAngel Pons
2021-09-08soc/{apl,glk}: Allow to select the primary graphics deviceMaxim Polyakov
2021-09-06soc/intel/broadwell: Drop unused PCH PCI device macrosAngel Pons
2021-09-06soc/intel/adl: Move USB4 hotplug Kconfig to commonFurquan Shaikh
2021-09-05soc/intel/common/cse: Add argument for CSE fixed client addrRizwan Qureshi
2021-09-05soc/intel/alderlake: Add tpch device information under dptfSumeet Pawnikar
2021-09-05soc/intel/common: Add PMC IPC commands for FIVRSumeet Pawnikar
2021-09-05soc/intel/jasperlake: Utilize vbt data size Kconfig optionSeunghwan Kim
2021-09-05soc/intel/elkhartlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-09-05soc/intel/cannonlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-09-05soc/intel/jasperlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-09-03soc/intel/alderlake: set power limits dynamically for thermalSumeet Pawnikar
2021-09-03soc/intel/common: get tdp of CPU for different SKUsSumeet Pawnikar
2021-09-03skylake: Default to `BOARD_TYPE_DESKTOP` for PCH-HAngel Pons
2021-09-03src/*: Specify type of `DIMM_MAX` onceAngel Pons
2021-09-03src/*: Specify type of `DIMM_SPD_SIZE` onceAngel Pons
2021-09-02soc/intel/tigerlake: Set MAX_CPUS for TGL-H to 16Tim Crawford
2021-09-01soc/intel/alderlake: Fix processor hang while plug unplug of TBT deviceSugnan Prabhu S
2021-08-28soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer
2021-08-27broadwell: Drop weak `mainboard_fill_spd_data` definitionAngel Pons
2021-08-27soc/intel/broadwell: Move `mainboard_fill_spd_data`Angel Pons
2021-08-27soc/intel/denverton_ns: Ensure CPU device has a valid linkFurquan Shaikh
2021-08-26soc/intel/tigerlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-08-26soc/intel/alderlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-08-26soc/intel/common/block: Add PAM locking functionTim Wawrzynczak
2021-08-25soc/intel/cannonlake: Fix PCH-H IRQ constraintsAngel Pons
2021-08-25soc/intel/tigerlake: Hook up ucode for TGL-HTim Crawford
2021-08-24soc/intel/broadwell: Move `pei_data` out of romstage.cAngel Pons
2021-08-24soc/intel/broadwell: Do early ME init a bit earlierAngel Pons
2021-08-24soc/intel/tigerlake: Add USB ACPI devices for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add SPI_DMI_DESTINATION_ID for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Set UserBd to recommended default for PCH-HJeremy Soller
2021-08-24soc/intel/tgl: Add PCR_PSF3_T0_SHDW_PMC_REG_BASE for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add TGL-H PEG portsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCIe root ports for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H GPIO definitionsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H PMC GPE group definitionsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H chipset devicetreeJeremy Soller
2021-08-24soc/intel/tigerlake: Add TGL-H power limitsJeremy Soller
2021-08-24soc/intel: Add TGL-H CPUIDJeremy Soller
2021-08-24Revert "soc/intel/broadwell/pch: Replace ACPI device NVS"Furquan Shaikh
2021-08-24Revert "soc/intel/broadwell/pch: Drop device NVS remainders"Furquan Shaikh
2021-08-20soc/intel/adl: Update power limits for ADL-M SKUSumeet Pawnikar
2021-08-20soc/intel/adl: Update PCI ID for ADL-M SKUSumeet Pawnikar
2021-08-20soc/intel/cannonlake: Unbreak some short linesNico Huber
2021-08-19Revert "src/soc/intel/cannonlake: Update C-state latency control limits"Nico Huber
2021-08-19acpi: Fill fadt->century based on KconfigNico Huber
2021-08-19soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESSKyösti Mälkki
2021-08-19soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboardSubrata Banik
2021-08-19soc/intel/alderlake: set default PL4 values for different SKUsSumeet Pawnikar
2021-08-19soc/intel/common: Add TGL-H PCI IDsJeremy Soller
2021-08-16mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cbMAULIK V VAGHELA
2021-08-16soc/intel/alderlake: Create eNEM Kconfig for Alder LakeSubrata Banik
2021-08-16soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS KconfigSubrata Banik
2021-08-15soc/intel/tigerlake: Select SF_MASK_2WAYS_PER_BIT if eNEM is enableSubrata Banik
2021-08-15soc/intel/common: Calculate and configure SF Mask 1Subrata Banik
2021-08-15soc/intel/common: Calculate and configure SF Mask 2Subrata Banik
2021-08-13soc/intel/tgl: Hook up ucode for TGL-U and TGL-RTim Crawford
2021-08-12soc/intel/alderlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/jasperlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/tigerlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/skylake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/cannonlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/alderlake: Configure the SKU specific parameters for VR domainsV Sowmya
2021-08-12soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADLV Sowmya
2021-08-12soc/intel/apollolake: add 4Gb and 6Gb dram densityJamie Chen
2021-08-12soc/intel/apollolake: change LPDDR4 density enum definitionJamie Chen
2021-08-12soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-STim Crawford
2021-08-11soc/intel/alderlake: Implement report_cache_info() functionSubrata Banik
2021-08-10mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cbMAULIK V VAGHELA
2021-08-09soc/intel/common/pcie/rtd3: Update _S0W to use symbol instead of 4Tim Wawrzynczak
2021-08-09soc/intel/common/cpu: Handle non-zero BSP APIC ID in init_cpusMAULIK V VAGHELA
2021-08-05soc/intel/alderlake: Add GFx Device ID 0x46aaBora Guvendik
2021-08-04Move post_codes.h to commonlib/console/Ricardo Quesada
2021-08-04soc/intel/cannonlake: Allow to configure maximum package C stateNico Huber
2021-08-04soc/intel/cannonlake: Disable `TccOffsetClamp` if no offset is givenNico Huber
2021-08-04soc/intel/cannonlake/vr_config: Print configured valuesNico Huber
2021-08-04soc/intel/cannonlake/vr_config: Add TDC values for CFL-H 6+2Nico Huber
2021-08-03soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes
2021-08-02soc/intel/broadwell: Drop early BAR macrosAngel Pons
2021-08-02soc/intel/broadwell: Replace soc/intel/common includeAngel Pons
2021-08-02soc/intel/broadwell/pch/pch.c: Drop unused includeAngel Pons
2021-08-02soc/intel/broadwell: Drop unused function declarationsAngel Pons
2021-08-02soc/intel/broadwell: Rename `ramstage.h`Angel Pons