diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-05-03 02:31:01 +0200 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-12 21:42:16 +0000 |
| commit | c8fc542e1b7828e86e2d4a5b6b743ce7a7d50665 (patch) | |
| tree | 0ed45b6cf14d62aef29909957ac85f317619655a /src/soc/intel | |
| parent | 673e6d1c67270677edb6c9af28835a15dcaa22ff (diff) | |
soc/intel/jasperlake: Clean up FSP chipset lockdown configuration
Use a variable to store if the FSP should be responsible for the chipset
lockdown and use it for setting related configuration options. Thus, get
rid of that if-else-clause.
Change-Id: I367554053f78b760ece6d59f79ce1f0e0f9fdfc6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52845
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/jasperlake/fsp_params.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index d68494f290..bb41b28f15 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -70,17 +70,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); /* Chipset Lockdown */ - if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) { - params->PchLockDownGlobalSmi = 0; - params->PchLockDownBiosInterface = 0; - params->PchUnlockGpioPads = 1; - params->RtcMemoryLock = 0; - } else { - params->PchLockDownGlobalSmi = 1; - params->PchLockDownBiosInterface = 1; - params->PchUnlockGpioPads = 0; - params->RtcMemoryLock = 1; - } + const bool lockdown_by_fsp = get_lockdown_config() == CHIPSET_LOCKDOWN_FSP; + params->PchLockDownGlobalSmi = lockdown_by_fsp; + params->PchLockDownBiosInterface = lockdown_by_fsp; + params->PchUnlockGpioPads = !lockdown_by_fsp; + params->RtcMemoryLock = lockdown_by_fsp; /* coreboot will send EOP before loading payload */ params->EndOfPostMessage = EOP_DISABLE; |