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path: root/src/soc/intel/alderlake
AgeCommit message (Expand)Author
2021-06-25soc/intel/alderlake: Update s0ix cstate tableBernardo Perez Priego
2021-06-24soc/intel/alderlake: Update mainboard_memory_init_params() argumentSubrata Banik
2021-06-24soc/intel/alderlake: Refactor soc_silicon_init_params functionSubrata Banik
2021-06-24soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfgSubrata Banik
2021-06-24soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb functionSubrata Banik
2021-06-23soc/intel/alderlake: Use devfn_disable() function for XDCISubrata Banik
2021-06-21soc/intel/alderlake: Add GFx Device ID 0x46b3Meera Ravindranath
2021-06-18soc/intel/alderlake: Add TBT PCIe root ports enablementBernardo Perez Priego
2021-06-17soc/intel/{alderlake,tigerlake}: Fix typo in pmc.hWerner Zeh
2021-06-17soc/intel/alderlake/romstage: Refactor soc_memory_init_params functionSubrata Banik
2021-06-16soc/intel/alderlake/romstage: Update display UPDs based on InternalGfxSubrata Banik
2021-06-16soc/intel/alderlake: Make use of is_devfn_enabled() functionSubrata Banik
2021-06-11soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"Sridhar Siricilla
2021-06-08soc/intel/alderlake/romstage: Drop ineffective FSP-M UPD `ChHashMask`Subrata Banik
2021-06-08soc/intel/alderlake: Set SaIpuEnable UPD according to devicetreeTim Wawrzynczak
2021-06-08soc/intel: Add Alder Lake's GT device IDSridhar Siricilla
2021-06-08soc/intel/alderlake: Correct TCSS XHCI Port status offsetSridhar Siricilla
2021-06-07cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki
2021-06-07soc/intel/adl: Add SKU specific power limits supportSumeet Pawnikar
2021-06-07soc/intel/alderlake: Update ACPI device ID of IOMMaulik V Vaghela
2021-06-07soc/intel: Drop unused lpss functionsFurquan Shaikh
2021-06-07soc/intel/alderlake: Set Base Addresses for TBT DMA remapping enginesSridhar Siricilla
2021-06-05soc/intel/alderlake: Add IDE-R and KT device into chipset.cbSubrata Banik
2021-06-04soc/intel/alderlake: Add PMC ACPI interfaceTim Wawrzynczak
2021-06-03soc/intel/alderlake: Add new memory parts for ADL boardsAmanda Huang
2021-05-30soc/intel/alderlake: Add placeholder SPD fileTim Wawrzynczak
2021-05-26soc/intel/alderlake: Update soundwire master countSugnan Prabhu S
2021-05-26soc/intel/alderlake: Add validity for TBT firmware authenticationJohn Zhao
2021-05-25soc/intel/alderlake: Fix SA_DEVFN_CPU_PCIE6_*Tim Wawrzynczak
2021-05-21soc/intel/common: Add Alder Lake device IDsSumeet R Pawnikar
2021-05-18soc/intel/alderlake: Add handling of GPIO_COM3 in gpio.aslMaulik V Vaghela
2021-05-18cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans
2021-05-18soc/intel/alderlake: mb/intel/sm: Add tcss codeDeepti Deshatty
2021-05-16soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwardsBora Guvendik
2021-05-16vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00Ronak Kanabar
2021-05-14soc/intel/alderlake: Update CPU and IGD Device IDsMaulik V Vaghela
2021-05-14soc/intel/alderlake: Add known GPIO virtual wire informationDeepti Deshatty
2021-05-14soc/intel/alderlake: Add known CPU Port IDs for GPIO communitiesDeepti Deshatty
2021-05-14soc/intel/alderlake: Add IOM PCR PIDDeepti Deshatty
2021-05-13src: Match array format in function declarations and definitionsPatrick Georgi
2021-05-10soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetrainingMaulik V Vaghela
2021-05-07soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXITKane Chen
2021-05-07soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmasterKane Chen
2021-05-06soc/intel/alderlake: Add CrashLog implementation for Intel ADLFrancois Toguo
2021-05-05soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIOMaulik V Vaghela
2021-05-04soc/intel/alderlake: remove duplicate PL2 overrideSumeet R Pawnikar
2021-05-03soc/intel/*: Update data types for variables holding PCH_DEVFN_* macrosTim Wawrzynczak
2021-05-03device: Switch pci_dev_is_wake_source to take pci_devfn_tTim Wawrzynczak
2021-05-03soc/intel/alderlake: Enable HWP CPPC support in CBravindr1
2021-05-03soc/intel/alderlake: Fill FSPM UPDs for VT-d configurationMeera Ravindranath
2021-04-26soc/intel/alderlake: Use device ID from pci_devs header fileJohn Zhao
2021-04-26soc/intel/alderlake: Fix devices list in the DMAR DRHD structureJohn Zhao
2021-04-23soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoCSumeet R Pawnikar
2021-04-22soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S
2021-04-22soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh
2021-04-21soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons
2021-04-21soc/intel: Replace open-coded buffer length calculationAngel Pons
2021-04-21soc/intel/alderlake: Enable PCIE RTD3 driverRizwan Qureshi
2021-04-16soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OCMaulik V Vaghela
2021-04-10soc/intel/alderlake: Drop unreferenced `InternalGfx`Angel Pons
2021-04-10soc/intel/alderlake: Skip D3Cold for TBTSubrata Banik
2021-04-06soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake MMaulik V Vaghela
2021-04-06soc/intel/alderlake: Update variable SD3C to only track enabled devicesJohn Zhao
2021-04-06soc/intel/alderlake: Remove TCSS DMA _DSM methodJohn Zhao
2021-03-30soc/intel/alderlake: Enable logging of wake sources for S0ixSugnan Prabhu S
2021-03-28soc/intel/alderlake: add processor power limits control supportSumeet R Pawnikar
2021-03-27soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik
2021-03-27soc/intel/alderlake: Correct GPE DWx assignment as per EDSSubrata Banik
2021-03-26soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik
2021-03-26soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik
2021-03-17soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstageSridhar Siricilla
2021-03-15soc/intel/alderlake: Drop 100ms delay and do not poll Link ActiveJohn Zhao
2021-03-15soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang
2021-03-15soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang
2021-03-15soc/intel/alderlake: Add Kconfig for recommended PCIe TBT resourcesTim Wawrzynczak
2021-03-15soc/intel/alderlake: Remove _DSD from tcss_pciexp ASL fileTim Wawrzynczak
2021-03-15soc/intel/alderlake: Remove _DSD from tcss_dma ASL fileTim Wawrzynczak
2021-03-12soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner
2021-03-08soc/intel/alderlake: Set LidStatus UPD if RUN_FSP_GOP selectedRonak Kanabar
2021-03-05soc/intel/adl, mb/google/brya: Add IPU to devicetreeTim Wawrzynczak
2021-03-03util: Add new memory part to LP4x listAmanda Huang
2021-03-03soc/intel: Factor out common smmrelocate.cAngel Pons
2021-03-03soc/intel/alderlake: Log internal device wake eventsTim Wawrzynczak
2021-03-03soc/intel/alderlake: Add some helper macros for accessing TCSS DMA devicesTim Wawrzynczak
2021-03-03soc/intel/alderlake: Add PCIe root port wake sources to elogTim Wawrzynczak
2021-03-03soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-03-01soc/intel: Drop `romstage_pch_init()` functionAngel Pons
2021-03-01soc/intel: Factor out common smbus.hAngel Pons
2021-03-01soc/intel: Factor out common gpe.hAngel Pons
2021-03-01soc/intel: Factor out identical acpigen GPIO helpersAngel Pons
2021-03-01soc/intel: Include gfx.asl from northbridgeAngel Pons
2021-02-24soc/intel/*/smmrelocate.c: Uniformize cosmeticsAngel Pons
2021-02-24soc/intel/*/pmutil.c: Align cosmetics across platformsAngel Pons
2021-02-24soc/intel/{adl,jsl,ehl,tgl}: Remove ITSS polarity restoreAamir Bohra
2021-02-24soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog supportTim Wawrzynczak
2021-02-17soc/intel/alderlake: Fix PCI IRQ tablesTim Wawrzynczak
2021-02-16soc/intel/{alderlake,apollolake}: Remove unused <string.h>Elyes HAOUAS
2021-02-16vc/google/chromeos: Always use CHROMEOS_RAMOOPS_DYNAMICKyösti Mälkki
2021-02-16ACPI: Add acpi_reset_gnvs_for_wake()Kyösti Mälkki