diff options
author | Kane Chen <kane.chen@intel.corp-partner.google.com> | 2021-05-04 09:53:38 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-07 06:05:37 +0000 |
commit | 3aee3ad46dd8d415c6236a74b27d15672fd0bb93 (patch) | |
tree | 5ac4a54983d6b6cf518f4089bb85520817de03fa /src/soc/intel/alderlake | |
parent | 7b7b33e3a615b0581df9e8e371fb218e97ba2a51 (diff) |
soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT
On tgl, we noticed system hang if a shutdown is triggered before fsps.
The dut is unable to shutdown properly due to tcss is stuck before
tcss_init in fsps.
This change enable power button smi on jsl, tgl, adl after fsps.
it can also prevent a shutdown failure due to lack of fsps init on
certain ip.
BUG=b:186194102, b:186815114
TEST=Power on the system and pressing power button repeatedly doesn't
cause the system hang during shutdown.
Change-Id: I70b871f2676a89bc782116e02beba5c20ec51eef
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r-- | src/soc/intel/alderlake/cpu.c | 6 | ||||
-rw-r--r-- | src/soc/intel/alderlake/pmc.c | 9 |
2 files changed, 13 insertions, 2 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 6de1cb011c..b97521215e 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -99,10 +99,12 @@ static void post_mp_init(void) cpu_set_max_ratio(); /* - * Now that all APs have been relocated as well as the BSP let SMIs + * 1. Now that all APs have been relocated as well as the BSP let SMIs * start flowing. + * 2. Skip enabling power button SMI and enable it after BS_CHIPS_INIT + * to avoid shutdown hang due to lack of init on certain IP in FSP-S. */ - global_smi_enable(); + global_smi_enable_no_pwrbtn(); } static const struct mp_ops mp_ops = { diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c index e4c100933c..03399c312e 100644 --- a/src/soc/intel/alderlake/pmc.c +++ b/src/soc/intel/alderlake/pmc.c @@ -18,6 +18,7 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <stdint.h> +#include <bootstate.h> #define PMC_HID "INTC1026" @@ -141,6 +142,14 @@ static void soc_acpi_mode_init(struct device *dev) pmc_set_acpi_mode(); } +static void pm1_enable_pwrbtn_smi(void *unused) +{ + /* Enable power button SMI after BS_DEV_INIT_CHIPS (FSP-S) is done. */ + pmc_update_pm1_enable(PWRBTN_EN); +} + +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); + struct device_operations pmc_ops = { .read_resources = soc_pmc_read_resources, .set_resources = noop_set_resources, |