Age | Commit message (Expand) | Author |
2019-08-07 | northbridge/intel: Rename ram_calc.c to memmap.c | Kyösti Mälkki |
2019-08-07 | intel/nehalem,sandybridge: Move stage_cache support function | Kyösti Mälkki |
2019-07-18 | nb/intel/sandybridge/acpi: Don't use defines for memory ranges | Patrick Rudolph |
2019-07-09 | arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class | Kyösti Mälkki |
2019-07-04 | arch/x86: Adjust size of postcar stack | Kyösti Mälkki |
2019-06-28 | {soc,northbridge}/Kconfig: Remove unused CACHE_MRC_SIZE_KB | Elyes HAOUAS |
2019-06-17 | 3rdparty/blobs: Update submodule, SNB improvements | Arthur Heymans |
2019-06-08 | nb/intel/sandybridge: Drop iommu.c and rename functions | Patrick Rudolph |
2019-06-03 | nb/intel/sandybridge: Remove variable set but not used | Elyes HAOUAS |
2019-06-03 | nb/intel/sandybridge: Remove variable set but not used | Elyes HAOUAS |
2019-06-03 | nb/intel/snb: Don't run VGA oprom when libgfxinit is enabled | Nico Huber |
2019-05-29 | src/northbridge: Add missing 'include <types.h>' | Elyes HAOUAS |
2019-05-29 | intel/sandybridge: Make timC training more robust. | Tobias Diedrich |
2019-05-22 | post_code: add post code for invalid vendor binary | Keith Short |
2019-05-16 | nb/intel/sandybridge: Move DMI init code | Patrick Rudolph |
2019-05-16 | sb/intel/sandybridge/early_pch: Make DMI init more readable | Patrick Rudolph |
2019-05-15 | src/northbridge: Remove unneeded include <arch/io.h> | Elyes HAOUAS |
2019-05-13 | nb/intel/sandybridge: Move boot_count_increment() | Patrick Rudolph |
2019-05-13 | nb/intel/sandybridge: Migrate MRC settings to devicetree | Patrick Rudolph |
2019-05-13 | mb/samsung/lumpy: Move onboard SPD to second channel | Patrick Rudolph |
2019-05-13 | nb/intel/sandybridge: Update pei_data comments | Patrick Rudolph |
2019-05-12 | nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE | Nico Huber |
2019-05-07 | {src,util}: Remove duplicated includes | Elyes HAOUAS |
2019-05-07 | {gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function | Elyes HAOUAS |
2019-05-06 | src: Remove unused include <halt.h> | Elyes HAOUAS |
2019-04-29 | nb/intel/sandybridge: Use system_reset() | Elyes HAOUAS |
2019-04-23 | nb/intel/sandybridge: add pch.h include | Patrick Georgi |
2019-04-23 | nb/intel/sandybridge: Drop pch.h from sandybridge.h | Patrick Rudolph |
2019-04-18 | nb/intel/sandybridge: Move southbridge code to bd82x6x | Patrick Rudolph |
2019-04-16 | sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB | Patrick Rudolph |
2019-04-09 | nb/intel/sandybridge: Set uninitialized run length | Jacob Garber |
2019-04-06 | src: Use include <delay.h> when appropriate | Elyes HAOUAS |
2019-03-27 | Move calls to quick_ram_check() before CBMEM init | Kyösti Mälkki |
2019-03-25 | Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX) | Julius Werner |
2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem() | Subrata Banik |
2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() | Subrata Banik |
2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
2019-03-19 | Fix 'unsigned int' to bare use of 'unsigned' | Subrata Banik |
2019-03-16 | src: Drop unused '#include <halt.h>' | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-06 | src: Drop unused include <arch/acpi.h> | Elyes HAOUAS |
2019-03-06 | nb/intel/sandybridge: Reserve CAR region with !NATIVE_RAMINIT | Kyösti Mälkki |
2019-03-06 | Remove DEFAULT_PCIEXBAR alias | Kyösti Mälkki |
2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
2019-02-10 | nb/intel/sandybridge: Use pcidev_on_root() | Kyösti Mälkki |
2019-01-25 | nb/intel/sandybridge/acpi: Add RMRR entry for iGPU | Nico Huber |
2019-01-23 | Drop leftover debug function declarations | Kyösti Mälkki |
2019-01-22 | cpu/intel/model_206ax: Use parallel MP init | Arthur Heymans |
2019-01-16 | nb/intel/sandybridge: Remove the C native graphic init | Arthur Heymans |
2019-01-16 | buildsystem: Promote rules.h to default include | Kyösti Mälkki |
2019-01-13 | {mb,nb,soc/fsp_baytrail}: Get rid of dump_mem() | Elyes HAOUAS |
2019-01-09 | cpu/intel: Use the common code to initialize the romstage timestamps | Arthur Heymans |
2019-01-06 | usbdebug: Make the EHCI debug console work in the bootblock | Arthur Heymans |
2019-01-06 | usbdebug: Refactor init calls | Kyösti Mälkki |
2019-01-06 | device: Use pcidev_path_on_root() | Kyösti Mälkki |
2019-01-06 | device: Use pcidev_on_root() | Kyösti Mälkki |
2018-12-19 | northbridge: Remove useless include <device/pci_ids.h> | Elyes HAOUAS |
2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
2018-11-16 | src: Remove unneeded include <cbmem.h> | Elyes HAOUAS |
2018-11-16 | src: Remove unneeded include <lib.h> | Elyes HAOUAS |
2018-11-01 | src: Add missing include <stdint.h> | Elyes HAOUAS |
2018-10-23 | src: Remove unneeded whitespace | Elyes HAOUAS |
2018-10-08 | Move compiler.h to commonlib | Nico Huber |
2018-09-28 | src/*: normalize Google copyright headers | Patrick Georgi |
2018-09-25 | northbridge: Use 'unsigned int' to bare use of 'unsigned' | Elyes HAOUAS |
2018-09-14 | nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resume | Nico Huber |
2018-08-22 | nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled | Arthur Heymans |
2018-08-21 | nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.c | Patrick Rudolph |
2018-08-20 | nb/intel/raminit: Remove unused headers | Patrick Rudolph |
2018-08-20 | nb/intel/sandybridge/raminit: Fix DIMM type mapping | Patrick Rudolph |
2018-08-20 | nb/intel/sandybridge: Fill in DIMM serial number | Patrick Rudolph |
2018-08-17 | sandybridge/raminit_common.c: fix printram statement | Iru Cai |
2018-08-03 | sandybridge/raminit_mrc: remove reference to report_platform_info() | Matt DeVillier |
2018-08-01 | sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining places | Felix Held |
2018-08-01 | sandybridge/raminit_common: use macro for execute command queue register | Felix Held |
2018-08-01 | sandybridge/raminit_common: use FOR_ALL_CHANNELS macro | Felix Held |
2018-08-01 | sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2] | Felix Held |
2018-08-01 | sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2] | Felix Held |
2018-08-01 | northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macros | Felix Held |
2018-08-01 | nb/intel/sandybridge: Don't use PCI operations on the pci_domain device | Arthur Heymans |
2018-07-30 | nb/intel/gm45: Use common code for SMM in TSEG | Arthur Heymans |
2018-07-29 | sandybridge/raminit_common: use MCHBAR32 macro everywhere | Felix Held |
2018-07-29 | sandybridge/raminit: use MCHBAR32 macro everywhere | Felix Held |
2018-07-29 | sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macros | Felix Held |
2018-07-29 | nb/intel/sandybridge: Bump MRC_CACHE_VERSION | Patrick Rudolph |
2018-07-28 | nb/intel/sandybridge/report_platform: Move remaining code to sb folder | Patrick Rudolph |
2018-07-28 | nb/intel/sandybridge: Move CPU report to cpu folder | Patrick Rudolph |
2018-07-28 | intel/sandybridge: Don't hardcode platform type | Patrick Rudolph |
2018-07-26 | nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width | Patrick Rudolph |
2018-07-26 | nb/intel/sandybridge/raminit: Fix PDWN_mode on desktops | Patrick Rudolph |
2018-07-25 | drivers/tpm: Add TPM ramstage driver for devices without vboot. | Philipp Deppenwiese |
2018-07-25 | nb/intel/sandybridge/raminit: Fix non ASCII char | Patrick Rudolph |
2018-07-25 | nb/intel/sandybridge/raminit: Set REFIx9 according to spec | Patrick Rudolph |
2018-07-02 | src/nb: Fix non-local header treated as local | Elyes HAOUAS |
2018-06-30 | arch/x86/acpi: Add DMAR RMRR helper functions | Matt DeVillier |
2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
2018-06-05 | cpu/intel/model_206ax: Switch to POSTCAR_STAGE | Arthur Heymans |