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raminit_native.c
Age
Commit message (
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Author
2020-12-25
nb/intel/sandybridge: Rewrite constant values
Angel Pons
2020-12-23
nb/intel/sandybridge: Rename I/O data timings
Angel Pons
2020-11-22
nb/intel/sandybridge: Clean up COMPOFST1 logic
Angel Pons
2020-11-22
nb/intel/sandybridge: Correct get_COMP2 function
Angel Pons
2020-11-22
nb/intel/sandybridge: Rename and refactor `discover_timC_write`
Angel Pons
2020-11-22
nb/intel/sandybridge: Rename and clean up `discover_edges_write`
Angel Pons
2020-11-22
nb/intel/sandybridge: Run `read_mpr_training` before write training
Angel Pons
2020-11-22
nb/intel/sandybridge: Rename `read_training` function
Angel Pons
2020-11-20
nb/intel/sandybridge: Rename `discover_edges` functions
Angel Pons
2020-11-16
nb/intel/sandybridge: Drop write_controller_mr() function
Angel Pons
2020-11-16
nb/intel/sandybridge: Reduce the scope of get_CWL()
Angel Pons
2020-09-21
src/northbridge: Drop unneeded empty lines
Elyes HAOUAS
2020-08-11
nb/intel/sandybridge/raminit: Add ECC debug code
Patrick Rudolph
2020-07-26
nb/intel/sandybridge: Add missing includes
Elyes HAOUAS
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-19
nb/intel/sandybridge: Refactor get_mem_min_tck
Angel Pons
2020-04-14
nb/intel/sandybridge/raminit: Add ECC support
Patrick Rudolph
2020-03-26
nb/intel/sandybridge: Rename raminit_ivy.c
Angel Pons
2015-10-03
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-07-22
intel raminit: rewrite timB high adjust calculation
Patrick Rudolph
2015-07-22
intel raminit: support two DIMMs per channel
Patrick Rudolph
2015-07-13
intel raminit: improve logging
Patrick Rudolph
2015-07-13
intel raminit: fix timB high adjust calculation
Patrick Rudolph
2015-07-13
intel raminit: whitespace fixes
Patrick Rudolph
2015-07-04
intel raminit: rename register
Patrick Rudolph
2015-06-28
intel raminit: check correct registers in channel_test
Patrick Rudolph
2015-06-28
intel raminit: properly handle DDR3 DIMMs with address mirroring
Patrick Rudolph
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-19
sandybridge: Try lower frequency if PLL didn't lock.
Vladimir Serbinenko
2015-02-17
sandybridge/raminit: Do not die() if timC calibration fails
Alexandru Gagniuc
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-11-30
Replace hlt() loops with halt()
Patrick Georgi
2014-11-30
intel/sandybridge: make sure to stay in HLT until reboot
Patrick Georgi
2014-08-25
sandybridge: Show spew raminit messages only with raminit debug
Vladimir Serbinenko
2014-07-29
northbridge/intel/sandybridge/raminit_native: Remove stale FIXME.
Vladimir Serbinenko
2014-07-29
sandy/ivybridge: Native raminit (lint clean)
Edward O'Callaghan
2014-07-29
sandy/ivybridge: Native raminit.
Vladimir Serbinenko