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| author | Patrick Rudolph <siro@das-labor.org> | 2017-10-28 18:20:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 10:02:14 +0000 |
| commit | dd662870dd9da0be937c593b0b62f3b5c8030cf7 (patch) | |
| tree | 73b465c828ea52e50eb4a856eaee47cad40a36eb /src/northbridge/intel/sandybridge/raminit_native.c | |
| parent | 05d4bf7ea76114dcbd21f8302e7152f40d806f18 (diff) | |
nb/intel/sandybridge/raminit: Add ECC support
Add ECC support for native raminit on SandyBridge/IvyBridge.
Change-Id: I1206746332c9939a78b67e7b48d3098bdef8a2ed
Depends-On: I5b7599746195cfa996a48320404a8dbe6820483a
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/22215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_native.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_native.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index d27914a184..99c1a4c4ff 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -537,7 +537,7 @@ int try_init_dram_ddr3(ramctr_timing *ctrl, int fast_boot, int s3resume, int me_ MCHBAR32(MC_INIT_STATE_G) &= ~(1 << 5); /* Set MAD-DIMM registers */ - dram_dimm_set_mapping(ctrl); + dram_dimm_set_mapping(ctrl, 1); printk(BIOS_DEBUG, "Done dimm mapping\n"); /* Zone config */ @@ -608,7 +608,13 @@ int try_init_dram_ddr3(ramctr_timing *ctrl, int fast_boot, int s3resume, int me_ err = channel_test(ctrl); if (err) return err; + + if (ctrl->ecc_enabled) + channel_scrub(ctrl); } + /* Set MAD-DIMM registers */ + dram_dimm_set_mapping(ctrl, 0); + return 0; } |