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path: root/src/soc/intel
AgeCommit message (Expand)Author
2021-11-25soc/intel/adl: Modify SOC_INTEL_ALDERLAKE_DEBUG_CONSENT default valueKane Chen
2021-11-25soc/intel/elkhartlake: Update SA DIDs TableRick Lee
2021-11-25soc/intel/graphics/Kconfig: Guard optionsArthur Heymans
2021-11-25soc/intel/common/thermal: Refactor thermal block to improve reusabilitySubrata Banik
2021-11-24soc/intel/elkhartlake: Disable Intel PSE by defaultLean Sheng Tan
2021-11-23soc/intel/alderlake: remove tmp bar assignment for cpu crashlogKane Chen
2021-11-22soc/intel/cannonlake: Fix PEG1 _PRT generationArthur Heymans
2021-11-22soc/intel: Allow enable/disable ME via CMOSSean Rhodes
2021-11-22soc/intel/{adl,ehl,jsl,tgl}: Remove unused header `thermal.h`Subrata Banik
2021-11-20soc/intel/alderlake: Hook up common code for thermal configurationSubrata Banik
2021-11-20soc/intel/alderlake: Set `pch_thermal_trip` for Dynamic Thermal ShutdownSubrata Banik
2021-11-20soc/intel/common/thermal: Allow thermal configuration over PMCSubrata Banik
2021-11-20soc/intel/common/thermal: Use `clrsetbits32()` for setting LTTSubrata Banik
2021-11-20soc/intel/common/thermal: Hook up IA thermal block to romstageSubrata Banik
2021-11-20soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value()Subrata Banik
2021-11-19soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-MBora Guvendik
2021-11-18drivers/fsp: Rewrite post code hex values in lowercaseSean Rhodes
2021-11-18soc/intel/alderlake: Add Acoustic noise mitigation UPDsWisley Chen
2021-11-17Revert "soc/intel/adl: Drop SGPM, RGPM and EGPM methods"Maulik V Vaghela
2021-11-17soc/intel/../thermal: Fix return type of `pch_get_ltt_value()`Subrata Banik
2021-11-16soc/intel/../thermal: Drop `ltt_value` local variableSubrata Banik
2021-11-15soc/intel/alderlake: Fix build failure with enabled CSE stitchingBernardo Perez Priego
2021-11-15Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"Hsuan-ting Chen
2021-11-15soc/intel/alderlake: Disable VT-d for early siliconsMeera Ravindranath
2021-11-15soc/intel/tigerlake: Add config option for S3 ACPISean Rhodes
2021-11-15soc/intel/tigerlake/apci: Only use SCM for ChromeOSSean Rhodes
2021-11-13soc/intel/xeon_sp: Fix size_t type mismatch in print statementPaul Menzel
2021-11-12soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDsTracy Wu
2021-11-11lynxpoint/broadwell: Use `azalia_codecs_init()`Angel Pons
2021-11-11haswell/lynxpoint/broadwell: Use `azalia_codec_init()`Angel Pons
2021-11-11lynxpoint/broadwell: Use `azalia_program_verb_table()`Angel Pons
2021-11-11soc/intel: move SGX ACPI code to block/acpiMichael Niewöhner
2021-11-11Spell Intel Cooper Lake-SP with a spacePaul Menzel
2021-11-11arch/x86: Refactor the SMBIOS type 17 write functionSubrata Banik
2021-11-10Rename ECAM-specific MMCONF KconfigsShelley Chen
2021-11-09soc/intel/alderlake: Enable Intel FIVR RFI settingsWisley Chen
2021-11-09soc/intel: generate SSDT instead of using GNVS for SGXMichael Niewöhner
2021-11-09pci_mmio_cfg: Always use pci_s_* functionsNico Huber
2021-11-09ChromeOS: Fix <vc/google/chromeos/chromeos.h>Kyösti Mälkki
2021-11-08soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL`Michael Niewöhner
2021-11-05soc/intel/denverton_ns: Refactor `detect_num_cpus_via_cpuid()`Angel Pons
2021-11-05soc/intel/xeon_sp: Refactor `get_threads_per_package()`Angel Pons
2021-11-05soc/intel/braswell: Make `num_cpus` unsignedAngel Pons
2021-11-05soc/intel/baytrail: Make `num_cpus` unsignedAngel Pons
2021-11-04soc/intel: Replace bad uses of `find_resource`Angel Pons
2021-11-03cpu/x86/Kconfig: Remove unused CPU_ADDR_BITSArthur Heymans
2021-11-03soc/intel/xeon_sp: disable PM ACPI timer if chosenMichael Niewöhner
2021-11-03soc/intel/alderlake: Allow devicetree override to leave some VR settings as d...Bora Guvendik
2021-11-02soc/intel/denverton_ns: Fetch addr bits at runtimeArthur Heymans
2021-11-02lib: Add new argument as `ddr_type` to smbios_bus_width_to_spd_width()Subrata Banik
2021-11-01soc/intel: Don't send CSE EOP if CSME is disabledSean Rhodes
2021-11-01soc/intel/braswell: Set GNVS DPTE via devicetreeAngel Pons
2021-11-01soc/intel/braswell/chip.h: Use `bool` typeAngel Pons
2021-11-01soc/intel/common/block/cse: Add get_me_fw_version functionJohnny Lin
2021-10-30lib: Use `smbios_bus_width_to_spd_width` for setting dimm.bus_widthSubrata Banik
2021-10-29soc/intel/alderlake: Add ACPI addition for USB4/TBT latency optimizationJohn Zhao
2021-10-29soc/intel/apollolake: Fix BUG-message when checking for XDCI deviceWerner Zeh
2021-10-29soc/intel/icelake: select SOC_INTEL_COMMON_BLOCK_ACPI_GPIOArthur Heymans
2021-10-27soc/intel/common/acpi: Correct IPC sub command for reading LPM requirementEthan Tsao
2021-10-26cpu/x86/Kconfig.debug_cpu: drop HAVE_DISPLAY_MTRRS optionFelix Held
2021-10-26soc/intel/quark/Kconfig: don't unselect CPU_X86_LAPICFelix Held
2021-10-26soc/intel/alderlake: set lock offset for gpio pad communitiesNick Vaccaro
2021-10-26soc/intel: Update api name for getting spi destination idWonkyu Kim
2021-10-26cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held
2021-10-26soc/*/Makefile: don't add cpu/x86/cacheFelix Held
2021-10-26soc/intel/common: Add HECI Reset flow in the CSE driverSridhar Siricilla
2021-10-26soc/intel/adl: Skip sending MBP HOB to save boot timeMAULIK V VAGHELA
2021-10-25cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held
2021-10-25soc/intel/common: Skip CSE post hook when CSE is disabledSubrata Banik
2021-10-22soc/intel/denverton_ns: use mp_cpu_bus_initFelix Held
2021-10-22soc/intel/elkhartlake: Add PSE PCI devices into header fileLean Sheng Tan
2021-10-22arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki
2021-10-22sb,soc/intel: Replace set_ioapic_id() with setup_ioapic()Kyösti Mälkki
2021-10-22sb,soc/intel: Set IOAPIC max entries before APIC IDKyösti Mälkki
2021-10-22sb,soc/intel: Set IOAPIC redirection entry countKyösti Mälkki
2021-10-22soc/intel/braswell: use mp_cpu_bus_initFelix Held
2021-10-22soc/intel/baytrail: use mp_cpu_bus_initFelix Held
2021-10-22cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held
2021-10-22cpu/x86/mp_init: use cb_err as status return type in remaining functionsFelix Held
2021-10-21soc/intel/skylake/cpu: rework failure handling in post_mp_initFelix Held
2021-10-21cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held
2021-10-20soc/intel/alderlake: Fix wrong FIVR configs assignmentBora Guvendik
2021-10-20soc/intel/{skl,apl}: don't run or even include SGX code if disabledMichael Niewöhner
2021-10-19soc/intel/skl: Constify `soc_get_cstate_map()`Patrick Georgi
2021-10-19soc/intel/common/block/cse: Use newly added `create-cse-region`Furquan Shaikh
2021-10-19soc/intel/common/cse: Support RW update when stitching CSE binaryFurquan Shaikh
2021-10-19soc/intel/alderlake: Enable support for CSE stitchingFurquan Shaikh
2021-10-19soc/intel/common/cse: Add support for stitching CSE componentsFurquan Shaikh
2021-10-19soc/intel: Constify `soc_get_cstate_map()`Angel Pons
2021-10-19acpi/acpigen: Constify CST functions' pointersAngel Pons
2021-10-19soc/intel/*/acpi.c: Don't copy structs with `memcpy()`Angel Pons
2021-10-18ACPI: Have common acpi_fill_mcfg()Kyösti Mälkki
2021-10-18intel/tigerlake: Add missing IRQ for CNViSean Rhodes
2021-10-18soc/skylake: Make VT-d controllable from CMOS optionSean Rhodes
2021-10-17soc/intel/skylake: switch to common ACPI codeMichael Niewöhner
2021-10-17soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM TimerMichael Niewöhner
2021-10-17soc/intel/*: only enable PM Timer emulation if the PM Timer is disabledMichael Niewöhner
2021-10-17soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner
2021-10-17soc/intel/{skl,cnl,dnv}: disable PM ACPI timer if chosenMichael Niewöhner
2021-10-17soc/intel: implement ACPI timer disabling per SoC and drop common codeMichael Niewöhner