Age | Commit message (Expand) | Author |
2021-01-29 | soc/intel: Remove duplicate call to acpi_wake_source() | Kyösti Mälkki |
2021-01-29 | device/Kconfig: Declare MMCONF symbols' type once | Angel Pons |
2021-01-29 | soc/intel: Drop CMEM from GNVS | Kyösti Mälkki |
2021-01-29 | soc/intel/baytrail,broadwell: Use resume_from_stage_cache() | Kyösti Mälkki |
2021-01-28 | soc/intel: Remove selection of ME_REGION_ALLOW_CPU_READ_ACCESS | Sridhar Siricilla |
2021-01-28 | xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices | Johnny Lin |
2021-01-28 | soc/intel/xeon_sp/skx: Add soc_acpi_name | Marc Jones |
2021-01-28 | ACPI: Separate ChromeOS NVS in ASL | Kyösti Mälkki |
2021-01-28 | ACPI: Declare GNVS variables globally | Kyösti Mälkki |
2021-01-28 | arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits | Kyösti Mälkki |
2021-01-28 | soc/intel: Refactor acpi_wake_source() | Kyösti Mälkki |
2021-01-28 | soc/intel: Refactor fill_acpi_wake() | Kyösti Mälkki |
2021-01-27 | soc/intel/alderlake: Generate LP4x SPD files using gen_spd.go | Amanda Huang |
2021-01-27 | ACPI: Separate device_nvs_t | Kyösti Mälkki |
2021-01-26 | soc/intel/braswell/romstage/romstage.c: Use __func__ | Elyes HAOUAS |
2021-01-26 | soc/intel/xeon_sp/acpi.c: Add ACPI C-State table | Marc Jones |
2021-01-26 | soc/intel: Move c-state resource define | Marc Jones |
2021-01-26 | sb,soc/intel: Refactor power_on_after_fail option | Kyösti Mälkki |
2021-01-25 | soc/intel/denverton_ns: Drop unused `pattrs.h` | Angel Pons |
2021-01-25 | soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver | Furquan Shaikh |
2021-01-25 | sb,soc/intel: Remove no-op APMC for C-state and P-state | Kyösti Mälkki |
2021-01-25 | cpu/x86/smm: Use common APMC logging | Kyösti Mälkki |
2021-01-25 | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner |
2021-01-25 | soc/intel/lpc_lib: mirror LPC registers to DMI when required | Michael Niewöhner |
2021-01-25 | soc/intel/xeon_sp/cpx: Fix loading MCU on APs | Arthur Heymans |
2021-01-25 | soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver | Furquan Shaikh |
2021-01-25 | soc/intel/common: Add support for populating meminit data | Furquan Shaikh |
2021-01-25 | soc/intel/tigerlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD | Bora Guvendik |
2021-01-24 | soc/intel/broadwell: Improve LPD0/LPD3 SerialIO ACPI methods | Angel Pons |
2021-01-24 | soc/intel/broadwell: Drop enable check from LPD0/LPD3 | Angel Pons |
2021-01-24 | soc/intel/quark/gpio_i2c.c: Use __func__ | Elyes HAOUAS |
2021-01-24 | soc/intel/denverton_ns/pmc.c: Use __func__ | Elyes HAOUAS |
2021-01-24 | soc/intel/denverton_ns/npk.c: Use __func__ | Elyes HAOUAS |
2021-01-24 | soc/intel/denverton_ns/lpc.c: Use __func__ | Elyes HAOUAS |
2021-01-24 | soc/intel/xeon_sp/cpx: Account for 'rc' heap manager | Arthur Heymans |
2021-01-24 | soc/intel/lpc_lib: drop dead code | Michael Niewöhner |
2021-01-24 | soc/intel/icl: drop wrong, unused code | Michael Niewöhner |
2021-01-24 | soc/intel/cnl: use Kconfig to determine PCH type | Michael Niewöhner |
2021-01-24 | soc/intel/broadwell: Align raminit with Haswell | Angel Pons |
2021-01-24 | soc/intel/broadwell: Drop `struct romstage_params` | Angel Pons |
2021-01-24 | broadwell: Flatten `mainboard_pre_raminit` | Angel Pons |
2021-01-24 | broadwell: Clean up `mainboard_post_raminit` | Angel Pons |
2021-01-24 | soc/intel/broadwell/chip.h: Drop unused fields | Angel Pons |
2021-01-24 | soc/intel/broadwell: Select CPU_INTEL_HASWELL | Angel Pons |
2021-01-24 | soc/intel/broadwell: Move romstage.c to Haswell | Angel Pons |
2021-01-24 | soc/intel/broadwell: Drop now-unused CPU code | Angel Pons |
2021-01-24 | soc/intel/broadwell: Use Haswell CPU headers | Angel Pons |
2021-01-24 | soc/intel/broadwell: Allow to use Haswell CPU code instead | Angel Pons |
2021-01-24 | soc/intel/broadwell: Select INTEL_LYNXPOINT_LP | Angel Pons |
2021-01-23 | soc/intel/baytrail,broadwell: Use bootstate for save_wake_source() | Kyösti Mälkki |
2021-01-23 | ACPI: Add helpers for CBMEM_ID_POWER_STATE | Kyösti Mälkki |
2021-01-23 | intel/baytrail,braswell,broadwell: Add const qualifier for power_state | Kyösti Mälkki |
2021-01-23 | ELOG: Add const qualifier for chipset_power_state | Kyösti Mälkki |
2021-01-23 | soc/intel/cometlake: Add ucode for CML-H | Tim Crawford |
2021-01-23 | soc/intel/apl: drop LPC pad configuration code | Michael Niewöhner |
2021-01-22 | soc/intel/alderlake: Adding Kconfig for ADL_M PCH | Varshit Pandya |
2021-01-22 | soc/intel/commmon: Include Alder Lake device IDs | Varshit Pandya |
2021-01-22 | soc/intel/baytrail,broadwell: Refactor acpi_wake_source() | Kyösti Mälkki |
2021-01-21 | soc/intel/quark: Add pwrs in <soc/nvs.h> | Kyösti Mälkki |
2021-01-21 | soc/intel/cannonlake: Allow RP#1 usage for ClkSrc | Jeremy Soller |
2021-01-21 | soc/intel/common/pcie_rp.h: Fix comment style | Furquan Shaikh |
2021-01-21 | soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD | Subrata Banik |
2021-01-21 | soc/intel/common/graphics: Add new Kconfig SOC_INTEL_DISABLE_IGD | Subrata Banik |
2021-01-20 | soc/intel: fix indentation in intelblocks/lpc_lib.h | Michael Niewöhner |
2021-01-20 | soc/intel/*: drop broken LPC mmio code | Michael Niewöhner |
2021-01-20 | ACPI GNVS: Drop most dev_count_cpu() | Kyösti Mälkki |
2021-01-19 | intel/xeon_sp, mb/ocp/deltalake: Rework get_stack_busnos() | Maxim Polyakov |
2021-01-18 | ACPI: Refactor ChromeOS specific ACPI GNVS | Kyösti Mälkki |
2021-01-18 | soc/intel/braswell/chip.c: Use __func__ | Elyes HAOUAS |
2021-01-18 | soc/intel/xeon_sp/uncore.c: Remove duplicated include | Elyes HAOUAS |
2021-01-18 | soc/intel/xeon_sp/skx/soc_acpi.c: Remove duplicated include | Elyes HAOUAS |
2021-01-18 | soc/intel/broadwell/bootblock.c: Remove repeated word | Elyes HAOUAS |
2021-01-18 | soc/intel/common/block/include/intelblocks/pmc_ipc.h: Remove repeated word | Elyes HAOUAS |
2021-01-18 | soc/intel/common/block/itss/itss.c: Remove repeated word | Elyes HAOUAS |
2021-01-18 | soc/intel/skylake/chip.h: Remove repeated word | Elyes HAOUAS |
2021-01-18 | soc/intel/alderlake: Update PCH and CPU PCIe RP table | Eric Lai |
2021-01-18 | soc/intel/common: Move L1_substates_control to pcie_rp.h | Eric Lai |
2021-01-18 | soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguous | Furquan Shaikh |
2021-01-15 | soc/intel/braswell: Prevent NULL pointer dereference | Angel Pons |
2021-01-15 | cpu/x86/mpinit: Serialize microcode updates for HT threads | Patrick Rudolph |
2021-01-14 | soc/intel/tgl: Add configurable value for UsbTcPortEn | Brandon Breitenstein |
2021-01-14 | build system: Structure and serialize INTERMEDIATE | Patrick Georgi |
2021-01-13 | ACPI: Have single call-site for acpi_inject_nvsa() | Kyösti Mälkki |
2021-01-13 | ACPI: Add common acpi_fill_gnvs() | Kyösti Mälkki |
2021-01-13 | soc/intel/tigerlake: Disable TC cold support | Srinidhi N Kaushik |
2021-01-12 | soc/intel: rename uart_max_index | Michael Niewöhner |
2021-01-12 | soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE` | Angel Pons |
2021-01-12 | soc/intel/common/pcie: Add helper function for getting mask of enabled ports | Furquan Shaikh |
2021-01-12 | soc/intel/alderlake: Add PCH ID 0x5182 | Subrata Banik |
2021-01-11 | soc/intel/{icl,tgl,jsl,ehl}: add LPIT support | Michael Niewöhner |
2021-01-11 | soc/intel/skl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
2021-01-11 | soc/intel/cnl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
2021-01-11 | acpi,soc/intel/common: add support for Intel Low Power Idle Table | Michael Niewöhner |
2021-01-11 | {soc,vc,mb}/intel: Drop support for Cannon Lake SoC | Felix Singer |
2021-01-11 | soc/intel/common/uart: Use simple(_s_) variants of PCI functions | Furquan Shaikh |
2021-01-11 | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh |
2021-01-11 | soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-S | Jeremy Soller |
2021-01-11 | soc/intel/cannonlake: Enable wake from USB in S4 | Patrick Rudolph |
2021-01-10 | soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs | Subrata Banik |
2021-01-10 | soc/intel/broadwell: Use `mp_cpu_bus_init` | Angel Pons |