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Age
Commit message (
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Author
2024-05-14
soc/intel/common: Add Panther Lake DIDs
Saurabh Mishra
2024-05-12
soc/intel/lunarlake: Support stepping A0_2
Saurabh Mishra
2024-04-04
soc/intel/cache_as_ram_fsp.S: Drop unused preprocessing directives
Arthur Heymans
2024-04-04
drivers/intel/fsp2_0: Support FSP-T in long mode
Arthur Heymans
2024-03-30
soc/intel: Remove blank lines before '}' and after '{'
Elyes Haouas
2024-03-28
cpu/x86: Link page tables in stage if possible
Arthur Heymans
2024-03-09
soc/intel/common/mp_init: Fix USE_INTEL_FSP_MP_INIT use-case
Jeremy Compostella
2024-03-05
soc/intel: Add definition of D0 stepping for TigerLake Halo
Alicja Michalska
2024-02-18
soc: Add SPDX license headers to Kconfig files
Martin Roth
2024-02-08
cpu/x86/64bit: Turn jumping to long mode into a macro
Arthur Heymans
2024-01-26
soc/intel/common: Add lunarlake device IDs
Appukuttan V K
2024-01-24
soc/intel: Rename Makefiles from .inc to .mk
Martin Roth
2023-12-15
soc/intel/cmn/cpu: Introduce API to disable signaling 3-strike event
Subrata Banik
2023-09-14
x86: Add .data section support for pre-memory stages
Jeremy Compostella
2023-09-12
cpu/intel: Move is_tme_supported() from soc/intel to cpu/intel
Jeremy Compostella
2023-09-01
soc/intel/cpu: Only show MP PPI option when meaningful
Arthur Heymans
2023-08-05
src/*/post_code.h: Change post code prefix to POSTCODE
Yuchen He
2023-08-03
soc/intel/common: Merge TME new key gen and exclusion range configs
Pratikkumar Prajapati
2023-07-12
intelblocks/cpu/mp_init: Add missing ADL-S SKUs to CPU match table
Michał Żygowski
2023-07-12
treewide: Drop the suffixes from ADL and RPL CPUID macros and strings
Michał Żygowski
2023-07-12
soc/intel/alderlake: Add support for Raptor Lake S CPUs
Max Fritz
2023-06-29
soc/intel/meteorlake: Add QS(C0) stepping CPU ID
Musse Abdullahi
2023-06-23
commonlib/console/post_code.h: Change post code prefix to POSTCODE
lilacious
2023-06-16
soc/intel/common: Add configs for TME exclusion range and new key gen
Pratikkumar Prajapati
2023-04-15
soc/intel/meteorlake: Add B0 stepping CPU ID
Musse Abdullahi
2023-04-11
drivers/fsp2_0/mp_service_ppi: Use struct device to fill in buffer
Arthur Heymans
2023-04-06
soc/intel/cmn/cpu: Add function to disable 3-strike CATERR
Subrata Banik
2023-02-25
soc/intel/{adl, cmn, mtl}: Refactor MP Init related configs
Subrata Banik
2023-02-23
soc/intel: Use common codeflow for MP init
Arthur Heymans
2023-02-09
arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminator
Felix Held
2023-02-09
treewide: Remove repeated words
Elyes Haouas
2023-02-08
arch/x86/cpu: introduce and use device_match_mask
Felix Held
2023-01-19
tree: Drop Intel Ice Lake support
Felix Singer
2023-01-08
soc/intel/common: Untie PRMRR from SGX
Pratikkumar Prajapati
2023-01-06
soc/intel/common: Check PRMRR dependent features
Pratikkumar Prajapati
2023-01-06
soc/intel/common: Add Kconfig option for Intel Key Locker
Pratikkumar Prajapati
2023-01-06
soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro
Pratikkumar Prajapati
2023-01-04
soc/intel/common: Add API to check Key Locker support
Pratikkumar Prajapati
2023-01-02
soc/intel/common: Move SGX supported API to cpulib
Pratikkumar Prajapati
2022-12-25
soc/intel: Move max speed API to common
Dinesh Gehlot
2022-12-16
cpu/intel: Fix clearing MTRR for clang 64bit
Arthur Heymans
2022-11-23
soc/intel/common: Define post codes
Martin Roth
2022-11-04
soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>
Elyes Haouas
2022-10-31
soc: Add SPDX license headers to Makefiles
Martin Roth
2022-09-16
soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID
Jeremy Soller
2022-09-06
src: remove force-included header rules.h from individual files
Martin Roth
2022-08-22
soc/intel/cmn/cpu: API to set TME core activation
Subrata Banik
2022-08-21
soc/intel/common/block/cpu: API to check if TME is supported
Subrata Banik
2022-08-21
soc/intel: Unravel `INTEL_TME` Kconfig option
Angel Pons
2022-08-16
soc/intel/common/cpu: Remove the address-of (`&`) operator usage
Subrata Banik
2022-07-20
treewide: Remove unused <cpu/x86/msr.h>
Elyes Haouas
2022-07-09
*/fsp/exit_car: Push stack address into %esp
Arthur Heymans
2022-06-28
soc/intel: Add Raptor Lake device IDs
zhixingma
2022-06-22
soc/intel/mp_init: Skip before_post_cpus_init if !USE_COREBOOT_MP_INIT
Subrata Banik
2022-06-22
soc/intel/cmn/block/cpu: Perform PRMRR sync on all cores
Subrata Banik
2022-06-22
intel/mp_init: Call `intel_reload_microcode()` before post_cpus_init()
Subrata Banik
2022-06-14
soc/intel/cmn/cpu: API to initialize core PRMRR
Subrata Banik
2022-06-14
soc/intel/common: Remove use of CPUID_EXTENDED_CPU_TOPOLOGY_V2
Ronak Kanabar
2022-06-09
soc/intel/cmn/mp_init: Reload microcode patch before post_cpus_init()
Subrata Banik
2022-06-07
soc/intel/cmn/mp_init: Create helper function to load microcode
Subrata Banik
2022-06-07
soc/intel/cmn/block/cpu: Set BIOS_DONE on all CPUs
Subrata Banik
2022-05-26
soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
Felix Singer
2022-05-18
intel/common/block: Provide RAPL and min clock ratio switches in common
Uwe Poeche
2022-05-16
soc/intel: Add Raptor Lake device IDs
Bora Guvendik
2022-05-16
soc/intel/common: Use mp_run_on_all_cpus_synchronously for APs MTRR init
Kane Chen
2022-05-16
soc/intel: Remove unused <cpu/intel/common/common.h>
Elyes HAOUAS
2022-04-04
soc/intel/alderlake: Add new CPU ID
Lean Sheng Tan
2022-04-04
soc/intel/alderlake: Update CPU IDs with correct steppings
Lean Sheng Tan
2022-04-01
arch/x86/postcar: Use a separate stack for C execution
Arthur Heymans
2022-03-17
soc/intel/common/block/cpu: Enable ROM caching in ramstage
Subrata Banik
2022-03-09
soc/intel/common: Include Meteor Lake device IDs
Wonkyu Kim
2022-01-11
soc/intel/apl: Rework on CPU privilege level implementation
Subrata Banik
2022-01-10
soc/intel/common: Add missing space before }
Paul Menzel
2021-12-13
soc/intel/common/block/cpu/car/exit_car_fsp.S: Align stack
Arthur Heymans
2021-12-06
soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio
Sridhar Siricilla
2021-12-06
soc/intel/common: Add CPU related APIs
Sridahr Siricilla
2021-11-29
soc/intel/common: Include Alder Lake-N device IDs
Usha P
2021-11-18
drivers/fsp: Rewrite post code hex values in lowercase
Sean Rhodes
2021-10-22
cpu/x86/mp_init: use cb_err as status return type in remaining functions
Felix Held
2021-10-17
soc/intel/*: only enable PM Timer emulation if the PM Timer is disabled
Michael Niewöhner
2021-10-05
src/soc to src/superio: Fix spelling errors
Martin Roth
2021-10-02
soc/intel/common: round PM Timer emulation frequency multiplier
Michael Niewöhner
2021-09-30
soc/intel/alderlake: Add CPU ID 0x906a4
Meera Ravindranath
2021-09-20
soc/intel/{common,tgl,adl}: guard TME Kconfig option by SoC support
Michael Niewöhner
2021-08-24
soc/intel: Add TGL-H CPUID
Jeremy Soller
2021-08-16
soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig
Subrata Banik
2021-08-15
soc/intel/common: Calculate and configure SF Mask 1
Subrata Banik
2021-08-15
soc/intel/common: Calculate and configure SF Mask 2
Subrata Banik
2021-08-09
soc/intel/common/cpu: Handle non-zero BSP APIC ID in init_cpus
MAULIK V VAGHELA
2021-07-24
soc/intel/common/block: Add space before comment delimiter
Subrata Banik
2021-07-14
src: use mca_clear_status function instead of open coding
Felix Held
2021-07-14
soc/intel/common: Use SPR for backing up data way and eviction mask
Subrata Banik
2021-07-14
soc/intel/common/block/cpu/cpulib: use mca_get_bank_count()
Felix Held
2021-07-14
include/cpu/x86/msr: introduce IA32_MC_*(x) macros
Felix Held
2021-06-26
soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard
Arthur Heymans
2021-06-24
soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE
Arthur Heymans
2021-06-24
soc/intel/cache_as_ram.S: Add macro to detect bootguard nem
Arthur Heymans
2021-06-22
soc/intel/car: Add support for bootguard CAR
Arthur Heymans
2021-06-22
soc/intel/common/cache_as_ram.S: Add macro to clear CAR
Arthur Heymans
2021-06-22
soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR
Arthur Heymans
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