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authorPratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>2022-12-19 11:21:56 -0800
committerSridhar Siricilla <sridhar.siricilla@intel.com>2023-01-04 03:41:39 +0000
commit08e8067a58177f65a5fa191a28aea5d52e37c541 (patch)
treea732ae25d0d54a85284cc0acf43a70d76a7ad088 /src/soc/intel/common/block/cpu
parent644b0f5f454eec6476de9dbd73aaf058e12c57c0 (diff)
soc/intel/common: Add API to check Key Locker support
Add is_keylocker_supported() API in common cpulib. This function checks if the CPU supports Key Locker feature. Returns true if Key Locker feature is supported otherwise false. Change-Id: Ide9e59a4f11a63df48838eab02c2c584cced12e1 Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71117 Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/cpu')
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 0e783447cf..534feb1155 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -533,3 +533,13 @@ bool is_sgx_supported(void)
msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
}
+
+bool is_keylocker_supported(void)
+{
+ struct cpuid_result cpuid_regs;
+ msr_t msr;
+
+ cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[23] is feature capability */
+ msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
+ return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
+}