| Age | Commit message (Expand) | Author |
|---|
| 2023-06-24 | soc/intel/cannonlake/chip.h: Use boolean type where applicable | lilacious |
| 2023-01-18 | soc/intel/cannonlake: Use common gpio.h include | Dinesh Gehlot |
| 2022-02-02 | soc/intel/cannonlake: Add `disable_vmx` devtree option | Angel Pons |
| 2021-10-05 | src/soc to src/superio: Fix spelling errors | Martin Roth |
| 2021-08-04 | soc/intel/cannonlake: Allow to configure maximum package C state | Nico Huber |
| 2021-04-21 | soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC | Rizwan Qureshi |
| 2021-04-08 | soc/intel/{cannonlake,icelake}: Drop unhooked `SendVrMbxCmd` | Angel Pons |
| 2021-02-20 | soc/intel/cannonlake: Add devicetree setting to disable turbo | Patrick Rudolph |
| 2021-01-11 | {soc,vc,mb}/intel: Drop support for Cannon Lake SoC | Felix Singer |
| 2021-01-01 | soc/intel/cnl: add panel and backlight configuration code | Michael Niewöhner |
| 2020-12-14 | soc/intel/cannonlake: Drop unreferenced devicetree settings | Angel Pons |
| 2020-12-08 | soc/intel/cannonlake: Align SATA mode names with soc/skl | Felix Singer |
| 2020-11-13 | soc/intel/cnl: replace the remains of HeciEnabled by device state in dt | Michael Niewöhner |
| 2020-11-13 | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner |
| 2020-11-09 | soc/intel/*/chip: Remove unused devicetree entry | Patrick Rudolph |
| 2020-10-26 | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner |
| 2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
| 2020-09-14 | soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h | Subrata Banik |
| 2020-09-04 | soc/intel/cnl: Enable HECI3 depending on devicetree | Felix Singer |
| 2020-08-23 | soc/intel/cnl: Configure FSP option PcieRpSlotImplemented | Nico Huber |
| 2020-07-01 | soc/intel/cannonlake: make satahotplug user configurable via devicetree | Jonas Loeffelholz |
| 2020-06-25 | soc/intel/cannonlake: Add PchPmPwrCycDur to chip options | Sridhar Siricilla |
| 2020-06-17 | soc/intel/cannonlake: Use table instead of switch-case | Patrick Rudolph |
| 2020-06-02 | soc/intel/cannonlake: Add RP configuration settings | Christian Walter |
| 2020-05-26 | cannonlake: update processor power limits configuration | Sumeet R Pawnikar |
| 2020-05-26 | soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options | Christian Walter |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-04 | soc/intel/cannonlake: Add DisableHeciRetry to config | Christian Walter |
| 2020-05-01 | src: Remove not used 'include <smbios.h>' | Elyes HAOUAS |
| 2020-04-06 | soc/intel/cannonlake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-03-17 | soc/intel/cannonlake: Set correct serirq mode | Jeremy Soller |
| 2020-03-04 | src: capitalize 'PCIe' | Elyes HAOUAS |
| 2020-02-28 | soc/intel/cannonlake: Plumb TetonGlacierMode into dt | Edward O'Callaghan |
| 2020-02-04 | soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idle | Aamir Bohra |
| 2020-01-18 | soc/intel/cannonlake: Add chip config for SATA strength | Jamie Chen |
| 2020-01-08 | soc/intel/cannonlake: Add VR config for CML | Jamie Chen |
| 2019-12-12 | soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h | Furquan Shaikh |
| 2019-11-27 | soc/intel/cannonlake: Disable USB2 PHY Power gating | Surendranath Gurivireddy |
| 2019-11-26 | soc/intel/cannonlake: Add chip config to override CPU flex ratio | Subrata Banik |
| 2019-11-04 | soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig | Michael Niewöhner |
| 2019-09-29 | soc/intel: Rename <intelblocks/chip.h> | Kyösti Mälkki |
| 2019-09-12 | soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage | Subrata Banik |
| 2019-09-12 | soc/intel/cannonlake: Add config for sata devslp pad reset configuration | Aamir Bohra |
| 2019-08-26 | soc/intel/cannonlake: Add config to disable display audio codec | Aamir Bohra |
| 2019-08-20 | soc/intel/cnl: Add provision to configure SD controller write protect pin | Aamir Bohra |
| 2019-06-28 | soc/intel/cannonlake: fix use of legacy 8254 timer | Matt DeVillier |
| 2019-06-21 | soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE | Arthur Heymans |
| 2019-05-20 | soc/intel/cannonlake: Make use of gpio_pm_configure() | Subrata Banik |
| 2019-05-11 | soc/intel/cnl: Enable VT-d | John Zhao |
| 2019-05-09 | soc/intel/cannonlake: Fix pcie clock number | Lijian Zhao |
| 2019-05-07 | mb/google/sarien: Add SMBIOS type 9 fields | Lijian Zhao |
| 2019-05-01 | mb/google/sarien: Disable S5 wake on LAN by default | Eric Lai |
| 2019-04-23 | soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig | Kane Chen |
| 2019-04-16 | soc/intel/cannonlake: Configure Vmx support using Kconfig | Ronak Kanabar |
| 2019-04-01 | soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree | Krishna Prasad Bhat |
| 2019-03-27 | soc/intel/cannonlake: Configure voltage margining policies | Krzysztof Sywula |
| 2019-03-21 | soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI ports | Krishna Prasad Bhat |
| 2019-03-16 | soc/intel/cannonlake: Add required FSP UPD changes for CML | Subrata Banik |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-02-22 | soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device... | Jeremy Soller |
| 2019-02-21 | src/soc/intel/cannonlake: Add PsysPmax setting | Gaggery Tsai |
| 2019-02-07 | soc/intel/cannonlake: Add Whiskeylake SoC kconfig | Subrata Banik |
| 2019-01-28 | src/soc/intel/cnl/chip.h: Fix preprocessor condition | Angel Pons |
| 2019-01-17 | soc/intel/cannonlake: Change in SaGv options | Ronak Kanabar |
| 2019-01-16 | soc/intel/cannonlake: Add processor power limits control support | Sumeet Pawnikar |
| 2019-01-08 | soc/intel/cannonlake: Add FSP UPD for minimum assertion width | Duncan Laurie |
| 2018-12-19 | soc/intel/cannonlake: SATA and DMI power optimize | Lijian Zhao |
| 2018-12-19 | soc/intel/cannonlake: Auto turn on HDA controller | Lijian Zhao |
| 2018-12-19 | soc/intel/cannonlake: Declare SATA Mode clear | Lijian Zhao |
| 2018-12-19 | soc/intel/cannonlake: Add Acoustic features | Lijian Zhao |
| 2018-11-17 | soc/intel/cannonlake: Add options for pcie ltr | Lijian Zhao |
| 2018-11-15 | soc/intel/cannonlake: Make static IRQ mapping for PIC mode | Subrata Banik |
| 2018-11-13 | soc/intel/cannonlake: Remove SmbusEnable | Duncan Laurie |
| 2018-11-07 | mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener... | Subrata Banik |
| 2018-10-17 | soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions | praveen hodagatta pranesh |
| 2018-09-28 | soc/intel/cannonlake: Update UPD from device switch | Lijian Zhao |
| 2018-08-09 | src/soc: Fix typo | Elyes HAOUAS |
| 2018-06-22 | soc/intel/common/block/cpu: Add option to skip coreboot AP init | Subrata Banik |
| 2018-06-06 | soc/intel/common/block: Add common chip config block | Subrata Banik |
| 2018-06-05 | soc/intel/cannonlake: Add option to skip coreboot MP init | Subrata Banik |
| 2018-04-05 | soc/intel/cannonlake: Add VT-d and VMX programming | Lijian Zhao |
| 2018-03-28 | soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled | Duncan Laurie |
| 2018-03-14 | soc/intel/cannonlake: Add SaGv value definition | Lijian Zhao |
| 2018-02-22 | soc/intel/cannonlake: Add more HDA Audio Link settings | Lijian Zhao |
| 2018-02-11 | soc/intel/cannonlake: Add Pch iSCLK programming | Lijian Zhao |
| 2018-02-08 | soc/intel/cannonlake: Add support for EMMC DLL update | Lijian Zhao |
| 2018-01-23 | mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219 | Lijian Zhao |
| 2018-01-05 | soc/intel/cannonlake: Correct PMC/GPIO routing information | Lijian Zhao |
| 2017-12-22 | ic2/designware: Move Intel i2c logic to shared driver | Chris Ching |
| 2017-12-05 | soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT | Furquan Shaikh |
| 2017-11-04 | soc/intel/cannonlake: Install common i2c | Lijian Zhao |
| 2017-11-01 | soc/intel/cannonlake: Use SCS common code | Bora Guvendik |
| 2017-10-18 | soc/intel/cannonlake: Set platform Debug Probe Type | Lijian Zhao |
| 2017-10-18 | soc/intel/cannonlake: Update PCIE CLKREQ programing | Lijian Zhao |
| 2017-10-03 | soc/intel/cannonlake: Add lpc pci driver | Lijian Zhao |
| 2017-09-20 | soc/intel/cannonlake: Add PMC pci drivers | Lijian Zhao |
| 2017-09-13 | soc/intel/cannonlake: Add serialio device config | Lijian Zhao |
| 2017-09-13 | soc/intel/cannonlake: Add common ACPI support for CNL | Lijian Zhao |
| 2017-08-30 | soc/intel/cannonlake: Add PrmrrSize and C6DRAM config | Subrata Banik |
