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authorNico Huber <nico.huber@secunet.com>2021-07-27 10:26:31 +0000
committerPaul Fagerburg <pfagerburg@chromium.org>2021-08-04 15:15:42 +0000
commit234e7ecb290d0469bd08565814bbffe2884e823e (patch)
treecd055728c0ce47ae701ed21cb783f46b1660e16d /src/soc/intel/cannonlake/chip.h
parente4bc55b843ae3df52c6e92181ac3e9f2e6a949e7 (diff)
soc/intel/cannonlake: Allow to configure maximum package C state
Sometimes it's preferable or even necessary (e.g. stability issues) to limit the maximum package C state. Let's add a devicetree option that keeps the current behavior if it is left unset. Change-Id: I0dc254d34f46de4c65cb85cc92e4b7f26618888d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
-rw-r--r--src/soc/intel/cannonlake/chip.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 3c8a68baf1..b8dfafde46 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -64,6 +64,19 @@ struct soc_intel_cannonlake_config {
/* Enable DPTF support */
int dptf_enable;
+ enum {
+ MAX_PC_DEFAULT = 0,
+ MAX_PC0_1 = 1,
+ MAX_PC2 = 2,
+ MAX_PC3 = 3,
+ MAX_PC6 = 4,
+ MAX_PC7 = 5,
+ MAX_PC7S = 6,
+ MAX_PC8 = 7,
+ MAX_PC9 = 8,
+ MAX_PC10 = 9,
+ } max_package_c_state;
+
/* Deep SX enable for both AC and DC */
int deep_s3_enable_ac;
int deep_s3_enable_dc;