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path: root/src/soc/intel/alderlake/fsp_params.c
AgeCommit message (Expand)Author
2022-02-21soc/intel/alderlake: Fix function pointer typeArthur Heymans
2022-02-21soc/intel/alderlake: Enable eMMC based on dev enabledKrishna Prasad Bhat
2022-02-04soc/intel/alderlake: Enable USB2 port reset message on Type-C portsAnil Kumar
2022-01-26soc/intel/alderlake: Skip FSP to unlock GPIO PadsSubrata Banik
2022-01-17src: Remove unused <cbfs.h>Elyes HAOUAS
2022-01-13vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2511_04Nick Vaccaro
2022-01-07soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDsTim Wawrzynczak
2021-12-03soc/intel/alderlake: Add TDP to give correct VR configurationCurtis Chen
2021-11-25soc/intel/alderlake: Add ADLP 4+4+2 power configurationsCurtis Chen
2021-11-19soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-MBora Guvendik
2021-11-18soc/intel/alderlake: Add Acoustic noise mitigation UPDsWisley Chen
2021-11-09soc/intel/alderlake: Enable Intel FIVR RFI settingsWisley Chen
2021-10-20soc/intel/alderlake: Fix wrong FIVR configs assignmentBora Guvendik
2021-10-17soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner
2021-10-15soc/intel/alderlake: fix NULL pointer dereferenceSelma Bensaid
2021-10-06soc/intel/alderlake: Skip setting D0I3 bit for HECI devicesSubrata Banik
2021-10-04src/soc/intel/alderlake: Add PsysPmax settingRyan Lin
2021-09-29soc/intel/alderlake: Add ADLP 242 power configurationsTracy Wu
2021-09-29soc/intel/alderlake: Add support for power cycle and SLP signal durationTim Wawrzynczak
2021-09-25soc/intel/alderlake: Use intel_microcode_find() to locate ucode.binSubrata Banik
2021-09-24soc/intel/alderlake: Switch to using device pointersFurquan Shaikh
2021-09-16drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling methodSubrata Banik
2021-09-10soc/intel/alderlake: Set LpmStateEnableMask UPDTim Wawrzynczak
2021-08-26soc/intel/alderlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-08-12soc/intel/alderlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/alderlake: Configure the SKU specific parameters for VR domainsV Sowmya
2021-08-12soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADLV Sowmya
2021-08-03soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes
2021-07-17soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik
2021-07-13soc/intel/alderlake: Add (and fix) devices in IRQ tableTim Wawrzynczak
2021-07-12soc/intel/alderlake: Set max Pkg C-states to AutoV Sowmya
2021-07-05soc/intel/alderlake: Add support to update the FIVR configsV Sowmya
2021-07-02soc/intel/alderlake: Add USB TCSS enablementBernardo Perez Priego
2021-07-01soc/intel/alderlake: Enable energy efficiency turbo modeV Sowmya
2021-07-01soc/intel: Refactor `xdci_can_enable()` functionAngel Pons
2021-06-30soc/intel/alderlake: Send End-of-Post message to CSETim Wawrzynczak
2021-06-29soc/intel/alderlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-25soc/intel/alderlake: Fix the typo for FSP_S_CONFIG paramV Sowmya
2021-06-24soc/intel/alderlake: Refactor soc_silicon_init_params functionSubrata Banik
2021-06-24soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfgSubrata Banik
2021-06-24soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb functionSubrata Banik
2021-06-23soc/intel/alderlake: Use devfn_disable() function for XDCISubrata Banik
2021-06-18soc/intel/alderlake: Add TBT PCIe root ports enablementBernardo Perez Priego
2021-06-16soc/intel/alderlake: Make use of is_devfn_enabled() functionSubrata Banik
2021-06-07soc/intel: Drop unused lpss functionsFurquan Shaikh
2021-05-18soc/intel/alderlake: mb/intel/sm: Add tcss codeDeepti Deshatty
2021-04-16soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OCMaulik V Vaghela
2021-03-15soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang
2021-03-08soc/intel/alderlake: Set LidStatus UPD if RUN_FSP_GOP selectedRonak Kanabar
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2021-01-06soc/intel/alderlake: Update CPU microcode patch base address/sizeSubrata Banik
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik