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authorTracy Wu <tracy.wu@intel.corp-partner.google.com>2021-09-27 16:48:32 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-09-29 10:07:00 +0000
commit697d6a81c26b775b166dd9e69a46fe5d2d1843c9 (patch)
treed5996ed8409bb94694d15476e10dc9e23be100f1 /src/soc/intel/alderlake/fsp_params.c
parentdee834aafcccf79f9d6c3319ead6212fced004a6 (diff)
soc/intel/alderlake: Add ADLP 242 power configurations
Add ADLP 242 sku power related settings, which follow the settings of ADLP 282 sku (both are 15w). BUG=b:201253904 TEST=Build and check fsp log to confirm the settings are set properly. Change-Id: I829dd690c22d167a507b1910106da06b275cec09 Signed-off-by: Tracy Wu <tracy.wu@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/alderlake/fsp_params.c')
-rw-r--r--src/soc/intel/alderlake/fsp_params.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index a92883cb50..8003471128 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -41,6 +41,7 @@
#define MILLIAMPS_TO_AMPS 1000
#define ICC_MAX_ID_ADL_P_3_MA 34250
#define ICC_MAX_ID_ADL_P_5_MA 32000
+#define ICC_MAX_ID_ADL_P_6_MA 32000
#define ICC_MAX_ID_ADL_P_7_MA 32000
/*
@@ -305,6 +306,8 @@ static uint16_t get_vccin_aux_imon_iccmax(void)
return ICC_MAX_ID_ADL_P_3_MA;
case PCI_DEVICE_ID_INTEL_ADL_P_ID_5:
return ICC_MAX_ID_ADL_P_5_MA;
+ case PCI_DEVICE_ID_INTEL_ADL_P_ID_6:
+ return ICC_MAX_ID_ADL_P_6_MA;
case PCI_DEVICE_ID_INTEL_ADL_P_ID_7:
return ICC_MAX_ID_ADL_P_7_MA;
default: