Age | Commit message (Expand) | Author |
2022-12-15 | nb/intel/sandybridge/sandybridge.h: Remove unnecessary guard | Elyes Haouas |
2021-04-10 | nb/intel: Factor out remaining MCHBAR macros | Angel Pons |
2021-02-23 | nb/intel/x4x,sandybridge: Move romstage_handoff_init() call | Kyösti Mälkki |
2021-02-10 | nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
2021-01-30 | nb/intel/sandybridge: Define and use MMCONF_BUS_NUMBER | Angel Pons |
2020-12-25 | nb/intel/sandybridge: Move steppings to CPU header | Angel Pons |
2020-12-12 | nb/intel/sandybridge: Clean up stepping logic | Angel Pons |
2020-09-21 | src/northbridge: Drop unneeded empty lines | Elyes HAOUAS |
2020-09-21 | nb/intel/sandybridge: Put DMIBAR/EPBAR registers into separate files | Angel Pons |
2020-09-21 | nb/intel/sandybridge: Move register headers into a subfolder | Angel Pons |
2020-09-21 | nb/intel/sandybridge: Clean up DMIBAR/EPBAR registers | Angel Pons |
2020-09-21 | nb/intel/sandybridge: Introduce memmap.h | Angel Pons |
2020-09-17 | nb/intel/sandybridge: Drop `void *` cast in `MCHBAR32` | Angel Pons |
2020-09-17 | nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR} | Angel Pons |
2020-09-17 | nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macro | Angel Pons |
2020-08-06 | nb/intel/sandybridge: Deduplicate PCIEXBAR decoding | Angel Pons |
2020-07-26 | nb/intel/sandybridge: Add missing includes | Elyes HAOUAS |
2020-07-24 | nb/intel/sandybridge: Put host bridge registers into its own file | Angel Pons |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-04-28 | device: Constify struct device * parameter to write_acpi_tables | Furquan Shaikh |
2020-03-25 | nb/intel/sandybridge: Use SPDX headers | Angel Pons |
2020-03-20 | nb/intel/sandybridge: Deduplicate report_memory_config | Angel Pons |
2020-03-18 | nb/intel/sandybridge: Tidy up code and comments | Angel Pons |
2020-03-17 | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi |
2020-02-01 | nb/intel/sandybridge: improve indexed register helper macros | Felix Held |
2020-01-16 | nb/intel/sandybridge: sort LANEBASE_* defines by their address | Felix Held |
2020-01-16 | nb/intel/sandybridge: add macros for byte lane register offsets | Felix Held |
2020-01-15 | nb/intel/sandybridge: refactor lane_registers[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: drop LyCx(r, x, y) macro | Felix Held |
2020-01-10 | nb/intel/sandybridge: Add a bunch of MCHBAR defines | Angel Pons |
2020-01-01 | nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase | Angel Pons |
2020-01-01 | nb/intel/sandybridge: add and use memory thermal configuration registers | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use ME stolen memory and lock bit defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use more MCHBAR register defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h | Felix Held |
2020-01-01 | nb/intel/sandybridge: use MESEG register names from datasheet | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for ME base and mask registers | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers | Felix Held |
2019-11-18 | nb/intel/sandybridge: Set up console in bootblock | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_early_init hook optional | Arthur Heymans |
2019-11-08 | arch/x86: Drop some __SMM__ guards | Kyösti Mälkki |
2019-11-01 | nb/intel: Remove unused 'barrier()' | Elyes HAOUAS |
2019-10-01 | intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL | Kyösti Mälkki |
2019-09-28 | nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use | Kyösti Mälkki |
2019-08-07 | intel/nehalem,sandybridge: Move stage_cache support function | Kyösti Mälkki |
2019-06-08 | nb/intel/sandybridge: Drop iommu.c and rename functions | Patrick Rudolph |
2019-05-16 | nb/intel/sandybridge: Move DMI init code | Patrick Rudolph |
2019-05-16 | sb/intel/sandybridge/early_pch: Make DMI init more readable | Patrick Rudolph |
2019-04-23 | nb/intel/sandybridge: Drop pch.h from sandybridge.h | Patrick Rudolph |
2019-03-06 | Remove DEFAULT_PCIEXBAR alias | Kyösti Mälkki |
2019-01-23 | Drop leftover debug function declarations | Kyösti Mälkki |
2019-01-16 | buildsystem: Promote rules.h to default include | Kyösti Mälkki |
2019-01-13 | {mb,nb,soc/fsp_baytrail}: Get rid of dump_mem() | Elyes HAOUAS |
2018-08-01 | northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macros | Felix Held |
2018-07-29 | sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macros | Felix Held |
2018-07-28 | nb/intel/sandybridge/report_platform: Move remaining code to sb folder | Patrick Rudolph |
2018-07-28 | intel/sandybridge: Don't hardcode platform type | Patrick Rudolph |
2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
2018-04-30 | nb/intel/sandybridge: Get rid of device_t | Elyes HAOUAS |
2018-04-10 | cpu/intel/sandybridge: Put stage cache into TSEG | Arthur Heymans |
2018-02-27 | sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location | Arthur Heymans |
2018-01-31 | nb/intel/*.h: Remove left-over register definitions | Patrick Rudolph |
2018-01-23 | sb/intel/bd82x6x: Reduce function-disable mess | Nico Huber |
2017-10-16 | sandybridge/acpi: remove unnessary check of PCI IDs | Vagiz Trakhanov |
2017-06-15 | nb/intel/sandybridge/gma: Use common init_igd_opregion method | Patrick Rudolph |
2017-05-19 | nb/intel/sandybridge: Hide additional nb devices | Patrick Rudolph |
2017-04-03 | nb/intel: Deduplicate vbt header | Patrick Rudolph |
2016-11-11 | intel/sandybridge: Use common ACPI S3 recovery | Kyösti Mälkki |
2016-09-04 | northbridge/intel/sandybridge: transition away from device_t | Antonello Dettori |
2016-06-17 | intel/model_206ax: Move platform specific defines | Kyösti Mälkki |
2016-03-11 | northbridge/intel: move mrccache.c of sandybridge + haswell to common | Alexander Couzens |
2016-03-11 | northbridge/intel: move mrc_cache definition into a common header | Alexander Couzens |
2016-03-02 | nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk | Patrick Rudolph |
2016-02-12 | Merge sandy/ivybridge romstage flow for MRC and non-MRC. | Vladimir Serbinenko |
2015-11-04 | nb/intel/sandybridge: Add ACPI DMAR table | Nico Huber |
2015-11-04 | nb/intel/sandybridge: Enable basic IOMMU support | Nico Huber |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-06-09 | Create i945-ivy smm tseg init based on ivy code. | Vladimir Serbinenko |
2015-05-28 | Migrate 206ax to SMM_MODULES | Vladimir Serbinenko |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-02-15 | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert |
2015-01-06 | northbridge/intel: Do not define include guard as 1 | Edward O'Callaghan |
2014-10-16 | sandybridge: Move common northbridge finalize to northbridge code. | Vladimir Serbinenko |
2014-10-11 | acpi: Remove explicit pointer tracking in per-device ssdt. | Vladimir Serbinenko |
2014-09-11 | Move nehalem/sandy/ivy to per-device acpi | Vladimir Serbinenko |
2013-05-01 | boot: remove cbmem_post_handling() | Aaron Durbin |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
2012-11-12 | Initial IGD OpRegion implementation | Stefan Reinauer |
2012-11-12 | Avoid using hardcoded values in MRC cache code | Vadim Bendebury |
2012-07-24 | Make ACPI code detect Sandy/Ivy Bridge dynamically | Stefan Reinauer |
2012-05-11 | Rework Sandybridge MRC cache handling | Stefan Reinauer |
2012-05-02 | Sandybridge: Display platform information early | Vadim Bendebury |
2012-05-01 | Fix Sandybridge/Ivybridge mainboards according to code review | Stefan Reinauer |
2012-04-05 | Add support for Intel Sandybridge CPU (northbridge part) | Stefan Reinauer |