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author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:41:06 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:32:10 +0000 |
commit | dddd1cc6913bd0cbb814b68de7315cb84bfb9c2f (patch) | |
tree | e4ad63b1db7fbeaf14ad5bf60046a0ed063b86a5 /src/northbridge/intel/sandybridge/sandybridge.h | |
parent | 7aa3372ce21565962d4cb1090e1f194b6f33f968 (diff) |
src/northbridge: Drop unneeded empty lines
Change-Id: I5f3118f0f855160ed49adc543b6169fccd7520ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44593
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/sandybridge.h')
-rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 24360ac110..8f9d118288 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -32,18 +32,15 @@ enum platform_type { PLATFORM_DESKTOP_SERVER, }; - /* Device 0:0.0 PCI configuration space (Host Bridge) */ #define HOST_BRIDGE PCI_DEV(0, 0, 0) #include "registers/host_bridge.h" - /* Devices 0:1.0, 0:1.1, 0:1.2, 0:6.0 PCI configuration space (PCI Express Graphics) */ #define AFE_PWRON 0xc24 /* PEG Analog Front-End Power-On */ - /* Device 0:2.0 PCI configuration space (Graphics Device) */ #define MSAC 0x62 /* Multi Size Aperture Control */ |