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Author
2021-04-10
nb/intel: Factor out remaining MCHBAR macros
Angel Pons
2021-02-10
nb/intel/ironlake: Use common {DMI,EP,MCH}BAR accessors
Angel Pons
2021-02-07
nb/intel/ironlake: Avoid pointer arithmetics
Angel Pons
2021-01-30
nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhere
Angel Pons
2020-12-07
nb/intel/ironlake: Introduce memmap.h
Angel Pons
2020-12-07
nb/intel/ironlake: Drop casts from DEFAULT_{MCHBAR,DMIBAR}
Angel Pons
2020-10-13
nb/intel/ironlake: Put DMIBAR/EPBAR registers into separate files
Angel Pons
2020-10-10
nb/intel/ironlake: Move register headers into a subfolder
Angel Pons
2020-10-10
nb/intel/ironlake: Clean up DMIBAR/EPBAR registers
Angel Pons
2020-09-21
src/northbridge: Drop unneeded empty lines
Elyes HAOUAS
2020-09-17
nb/intel/ironlake: Drop invalid `DEFAULT_RCBABASE` macro
Angel Pons
2020-08-03
nb/intel/ironlake: Add Generic Non-Core register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Add Generic Non-Core PCI device definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Physical Layer registers
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Physical Layer device definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Link register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Add definition for QPI Link PCI device
Angel Pons
2020-08-03
nb/intel/ironlake: Add SAD DRAM register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Correct PCIEXBAR definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add definition for SAD PCI device
Angel Pons
2020-08-03
nb/intel/ironlake: Put host bridge registers into its own file
Angel Pons
2020-07-01
nb/intel/ironlake/ironlake.h: Clean up
Angel Pons
2020-07-01
nb/intel/ironlake: Remove unused structs
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-05
src/northbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-15
nb/intel/nehalem: Rename to ironlake
Angel Pons