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path: root/src/northbridge/intel/haswell/chip.h
AgeCommit message (Expand)Author
2024-08-26nb/intel/haswell: Move SPD addresses to devicetreeKeith Hui
2021-03-10nb/intel/haswell/pcie.c: Add missing pre-ASPM initAngel Pons
2021-01-01nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settingsMichael Niewöhner
2021-01-01soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representationMichael Niewöhner
2020-09-08nb/intel/haswell: Drop `gpu_panel_port_select`Angel Pons
2020-07-12haswell: Move some MRC settings to devicetreeAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-29nb/intel/haswell: Implement proper backlight PWM configNico Huber
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-15nb/intel/haswell: Tidy up code and commentsAngel Pons
2019-08-20devicetree: Remove duplicate chip_ops declarationsKyösti Mälkki
2018-11-01nb/intel/haswell/gma: Support boards that have DDI E connectedTristan Corrick
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-28igd.asl rewriteVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-16 11:32:52 +0000