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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-28 15:00:39 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-01 11:25:22 +0000 |
| commit | 44fa0d4ca00fa4ca88415b7ca717767dd31f83f7 (patch) | |
| tree | 56b26901fe49b773c120683399bce44a117c6fc2 /src/northbridge/intel/haswell/chip.h | |
| parent | 9e38efc27be1e5561da611b1e570ef3a52529da2 (diff) | |
soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation
For easier review of the switch to a new register struct in the
follow-up change, the panel delay times get converted from destination
register raw format to milliseconds representation in this change.
Formula for conversion of power cycle delay:
gpu_panel_power_cycle_delay_ms =
(gpu_panel_power_cycle_delay - 1) * 100
Formula for all others:
gpu_panel_power_X_delay_ms = gpu_panel_power_X_delay / 10
The register names gain a suffix `_ms` and calculation of the
destination register raw values gets done in gma code now.
Change-Id: Idf8e076dac2b3048a63a0109263a6e7899f07230
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48958
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell/chip.h')
| -rw-r--r-- | src/northbridge/intel/haswell/chip.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h index 73375d788d..b1c8d37a74 100644 --- a/src/northbridge/intel/haswell/chip.h +++ b/src/northbridge/intel/haswell/chip.h @@ -17,11 +17,11 @@ struct northbridge_intel_haswell_config { u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */ u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */ - u8 gpu_panel_power_cycle_delay; /* T4 time sequence */ - u16 gpu_panel_power_up_delay; /* T1+T2 time sequence */ - u16 gpu_panel_power_down_delay; /* T3 time sequence */ - u16 gpu_panel_power_backlight_on_delay; /* T5 time sequence */ - u16 gpu_panel_power_backlight_off_delay; /* Tx time sequence */ + u16 gpu_panel_power_cycle_delay_ms; /* T4 time sequence */ + u16 gpu_panel_power_up_delay_ms; /* T1+T2 time sequence */ + u16 gpu_panel_power_down_delay_ms; /* T3 time sequence */ + u16 gpu_panel_power_backlight_on_delay_ms; /* T5 time sequence */ + u16 gpu_panel_power_backlight_off_delay_ms; /* Tx time sequence */ unsigned int gpu_pch_backlight_pwm_hz; enum { |