summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/gm45/gm45.h
AgeCommit message (Expand)Author
2021-01-30nb/intel/gm45: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-18Revert "nb/intel/gm45/gm45.h: Remove duplicated include"Patrick Georgi
2021-01-18nb/intel/gm45/gm45.h: Remove duplicated includeElyes HAOUAS
2021-01-10nb/intel/gm45: Guard macro parametersAngel Pons
2021-01-10nb/intel/gm45: Guard `CxDRBy_BOUND_SHIFT` macro parametersAngel Pons
2020-10-24nb/intel/gm45: Clean up header handlingAngel Pons
2020-10-24nb/intel/gm45: Introduce memmap.hAngel Pons
2020-10-24nb/intel/gm45: Add more DMIBAR/EPBAR registersAngel Pons
2020-09-29nb/intel/gm45: Answer question about conversion stepping A1Angel Pons
2020-09-25nb/intel/gm45/gm45.h: Clean up cosmeticsAngel Pons
2020-09-25nb/intel/gm45: Drop unused `DEFAULT_HECIBAR` macroAngel Pons
2020-09-25nb/intel/gm45: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-08-04nb/intel/gm45: Deduplicate PCIEXBAR decodingAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2019-10-14sb/intel/i82801ix: Add common code to set up LPC IO decode rangesArthur Heymans
2019-09-28nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ useKyösti Mälkki
2019-03-06Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki
2019-02-06nb/intel/gm45: Use a common romstageArthur Heymans
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2018-12-03nb/intel/gm45: Make fetching the blc_pwm freq globalArthur Heymans
2018-12-03nb/intel/gm45: Correctly cache TSEGArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-02src/nb: Fix non-local header treated as localElyes HAOUAS
2018-04-30nb/intel/gm45: Get rid of device_tElyes HAOUAS
2018-03-28nb/intel/gm45: Allocate a 8M TSEG regionArthur Heymans
2017-05-03nb/intel/gm45: Set display backlight according to EDID stringArthur Heymans
2017-04-19console: Add convenient debug level macros for raminitNico Huber
2017-04-19nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUPNico Huber
2016-11-28nb/intel/gm45: Fix panel-power-sequence clock divisorNico Huber
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-09-13northbridge/intel/gm45: transation away from device_tFurquan Shaikh
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-05device_ops: add device_t argument to write_acpi_tablesAlexander Couzens
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-01-06northbridge/intel: Do not define include guard as 1Edward O'Callaghan
2014-10-15gm45: Convert to per-device ACPIVladimir Serbinenko
2014-08-16gm45: Decrease MTRR usageVladimir Serbinenko
2014-08-13gm45: Allow skiping voltage config.Vladimir Serbinenko
2014-07-29gm45: Move spd address map to board-specific config.Vladimir Serbinenko
2013-09-11CBMEM: Unify get_top_of_ram()Kyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27intel/gm45: new northbridgePatrick Georgi
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 01:12:05 +0000