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path: root/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
AgeCommit message (Expand)Author
2019-11-20nb/amd/fam10: Drop supportArthur Heymans
2019-08-10src: Include <stdint.h> instead of <inttypes.h>Jacob Garber
2019-07-02src: Use CRx_TYPE type for CRxElyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-07-09src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
2017-01-11amd/mct/ddr3: Correctly program maximum read latencyTimothy Pearson
2017-01-04amdfam10: Perform major include ".c" cleanupDamien Zammit
2016-10-09northbridge/amd/amdmct/mct_ddr3: Remove commented codeElyes HAOUAS
2016-09-21northbridge/amd/amdmct: Improve code formattingElyes HAOUAS
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-08-31northbridge/amd: Add required space before opening parenthesis '('Elyes HAOUAS
2016-05-09nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15hTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Warn if MaxRdLatency training fails on Family 15hTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Skip nibble training when current DIMM is not x4Timothy Pearson
2016-05-01nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15hTimothy Pearson
2016-04-22nb/amd/mct_ddr3: Run fence training on each node after memory clock changeTimothy Pearson
2016-03-26nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit
2016-03-24nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson
2016-03-23nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_...Timothy Pearson
2016-03-12nb/amd/mct_ddr3: Consolidate duplicated codeTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetchTimothy Pearson
2016-02-19nb/amd/amdmct: Add socket specific configuration for FM2Damien Zammit
2016-01-24nb/amd/mct_ddr3: Add additional verbose-level debug statementsTimothy Pearson
2015-11-30nb/amd/amdmct/mct_ddr3: Use StopOnError to decrease training timeTimothy Pearson
2015-11-23amd/amdmct/mct_ddr3: Fix poor performance on Family 15h CPUsTimothy Pearson
2015-11-16northbridge/amd/mct_ddr3: Add registered and x4 DIMM support to Fam15hTimothy Pearson
2015-11-16amd/amdmct/mct_ddr3: Partially fix up registered DIMMs on Fam10hTimothy Pearson
2015-11-16nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slotsTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix Family 10h boot failureTimothy Pearson
2015-11-02cpu/amd: Add initial AMD Family 15h supportTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-26northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalizationTimothy Pearson
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-06-03northbridge/amd/amdmct: Use `static const` instead of `const static`Paul Menzel
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2011-01-06Fix some settings fo AMD MCT. It is based on BIOS test suite.Zheng Bao
2010-12-02More explicite and straight way to set seed.Zheng Bao
2010-10-08Trivial. Fix the typo.Zheng Bao
2010-10-01Trivial. Re-indent the code.Zheng Bao
2010-08-30Trivial syntax correction of AMD mct_ddr3 dir.Kerry She
2010-04-23DDR3 support for AMD Fam10.Zheng Bao
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