diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-24 15:55:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-08 11:35:26 +0000 |
| commit | a9473ecbb142d07e95b120dbab6e9e50017f1e55 (patch) | |
| tree | eff72fa0a3176aee0b2568b627553788922c7042 /src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | |
| parent | f33e835a064d11179c37d2c306ba024aa3a636fd (diff) | |
src: Replace common MSR addresses with macros
Change-Id: I9fba67be12483ea5e12ccd34c648735d409bc8b0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c index 1db1b54307..42627e8445 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c @@ -2427,7 +2427,7 @@ void mct_Wait(u32 cycles) cycles <<= 3; /* x8 (number of 1.25ns ticks) */ - msr = 0x10; /* TSC */ + msr = TSC_MSR; /* TSC */ _RDMSR(msr, &lo, &hi); saved = lo; do { |