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path: root/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
AgeCommit message (Expand)Author
2019-11-20nb/amd/fam10: Drop supportArthur Heymans
2019-06-21nb/amd/amdmct/mct_ddr3: Remove duplicate conditionalJacob Garber
2019-06-21nb/amd/amdmct/mct_ddr3: Remove duplicate codeJacob Garber
2019-06-03nb/amd/amdmct/mct_ddr3/mct_d.c: Remove variable set but not usedElyes HAOUAS
2019-05-29src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS
2019-04-25src/northbridge/amd: Remove unused variablesElyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2018-11-08nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macrosElyes HAOUAS
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-10-31reset: Finalize move to new APINico Huber
2018-10-30{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
2017-08-10nb/amd_fam10/mct_ddr3: Use common function to compute crc16 checksumArthur Heymans
2017-01-19nb/amd/ddr3: Make the maximum CDD a signed valueTimothy Pearson
2017-01-11amd/mct/ddr3: Fix unintended sign extension warningTimothy Pearson
2017-01-11amd/mct/ddr3: Rework memory speed to clock value conversion logicTimothy Pearson
2017-01-10amd/mct/ddr3: Allow critical delay delta to go negativeTimothy Pearson
2017-01-10amd/mct/ddr3: Wait for northbridge P-state transitionsTimothy Pearson
2017-01-10amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStrucTimothy Pearson
2017-01-04amdfam10: Perform major include ".c" cleanupDamien Zammit
2016-10-09northbridge/amd/amdmct/mct_ddr3: Remove commented codeElyes HAOUAS
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-09-21northbridge/amd/amdmct: Improve code formattingElyes HAOUAS
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-08-31northbridge/amd: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/northbridge: Remove unnecessary whitespace before "\n" and "\t"Elyes HAOUAS
2016-05-09nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structureTimothy Pearson
2016-05-09nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15hTimothy Pearson
2016-04-28nb/amd/mct_ddr3: Restart system on training failure instead of using die()Timothy Pearson
2016-04-22Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training"Timothy Pearson
2016-04-08Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"Timothy Pearson
2016-04-08nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson
2016-04-08nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform levelTimothy Pearson
2016-03-31nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstageTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEsTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Disable MCE framework during DRAM trainingTimothy Pearson
2016-03-30nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installedTimothy Pearson
2016-03-30northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)Damien Zammit
2016-03-28nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()Timothy Pearson
2016-03-26nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit
2016-03-24nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson
2016-02-19nb/amd/amdmct: Add socket specific configuration for FM2Damien Zammit
2016-02-05nb/amd/mct_ddr3: Work around RDIMM training failureTimothy Pearson
2016-01-29nb/amdmct/mct_ddr3: Enable mainboard voltage setTimothy Pearson
2016-01-24nb/amd/mct_ddr3: Update drive strength configurationTimothy Pearson
2016-01-24northbridge/amd/amdmct/mct_ddr3: Enable fast refresh on ETR devicesTimothy Pearson
2016-01-24northbridge/amd/amdmct: Add termination and timing values for C32 socketsTimothy Pearson
2015-12-01nb/amd/mct_ddr3: Add Family 15h tristate enable codesTimothy Pearson
2015-11-29nb/amd/amdmct/mct_ddr3: Ensure channel clock skew is properly setTimothy Pearson
2015-11-24northbridge/amd/amdmct/mct_ddr3: Add CC6 setup information messagesTimothy Pearson
2015-11-24amd/amdfam10: Control Fam15h cache partitioning via nvramTimothy Pearson
2015-11-23amd/amdmct/mct_ddr3: Fix poor performance on Family 15h CPUsTimothy Pearson
2015-11-22amd/amdmct/mct_ddr3: Set prefetch double stride to improve performanceTimothy Pearson
2015-11-22nb/amd/amdmct/mct_ddr3: Force DRAM retraining on every bootTimothy Pearson
2015-11-19northbridge/amd/amdmct/mct_ddr3: Move K10D configuration into separate fileTimothy Pearson
2015-11-18cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequenceTimothy Pearson
2015-11-16northbridge/amd/mct_ddr3: Add registered and x4 DIMM support to Fam15hTimothy Pearson
2015-11-16amd/amdmct/mct_ddr3: Partially fix up registered DIMMs on Fam10hTimothy Pearson
2015-11-16nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slotsTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix Family 10h boot failureTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Set SkewMemClk when both DCTs are in useTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Add missing Family 15h RDIMM Rtt valuesTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix null pointer access and related hangsTimothy Pearson
2015-11-15amd/amdmct/mct_ddr3: Add Family 15h RDIMM timing and ODT valuesTimothy Pearson
2015-11-15cpu/amd: Fix AMD Family 15h ECC initialization reliability issuesTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix lockups and wasted time during ECC initTimothy Pearson
2015-11-14northbridge/amd/amdmct/mct_ddr3: Add additional debug trace statementsTimothy Pearson
2015-11-14northbridge/amd/amdfam10: Properly indicate node and channel in SMBIOS tablesTimothy Pearson
2015-11-12northbridge/amd/amdmct/mct_ddr3: Update prefetcher configurationTimothy Pearson
2015-11-12northbridge/amd/amdmct: Clear memory before enabling ECCTimothy Pearson
2015-11-12src/northbridge/amd/amdmct: Add option to override bad SPD checksumTimothy Pearson
2015-11-12northbridge/amd/amdmct: Verify MCT NVRAM options before skipping trainingTimothy Pearson
2015-11-11northbridge/amd/amdmct: Skip DCT config write to Flash if unchangedTimothy Pearson
2015-11-11cpu/amd: Add CC6 supportTimothy Pearson
2015-11-11northbridge/amd/amdfam10: Enable CC6 DRAM save area setupTimothy Pearson
2015-11-11amd/amdmct/mct_ddr3: Use training values from previous boot if possibleTimothy Pearson
2015-11-11amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliabilityTimothy Pearson
2015-11-10northbridge/amd/amdmct/mct_ddr3: Clean up curly brace style violationsTimothy Pearson
2015-11-10northbridge/amd/amdmct: Read SPD data into cache to decrease bootup timeTimothy Pearson
2015-11-08amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup on Fam15hTimothy Pearson
2015-11-02cpu/amd: Add initial AMD Family 15h supportTimothy Pearson
2015-11-02northbridge/amd/amdfam10: Set DIMM voltage based on SPD dataTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-30northbridge/amd/amdmct/mct_ddr3: Add initial Suspend to RAM (S3) supportTimothy Pearson
2015-10-26northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalizationTimothy Pearson
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-01northbridge/amd/amdfam10: Collect DIMM information for ramstage useTimothy Pearson
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
2014-05-23northbridge/amd/amdmct: Superfluous parenthesis in if-statementsEdward O'Callaghan
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-03-02Fix ECC disable option for AMD Fam10 DDR2 and DDR3.Marc Jones
2011-10-15AMD CPU and chipset fixes for compilation with gcc 4.6Stefan Reinauer
2011-06-03This patch sets max freq defaults for ddr2 and ddr3for fam10.Marc Jones
2011-01-06Fix some settings fo AMD MCT. It is based on BIOS test suite.Zheng Bao
2010-10-08Trivial. Spell checking.Zheng Bao
2010-09-28Trivial. re-Indent the code.Zheng Bao
2010-09-27Obviously missing brackets.Xavi Drudis Ferran
2010-09-21Fix the typo. Field DisAutoRefresh is in DramTimngHi.Zheng Bao
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