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path: root/src/mainboard/intel/tglrvp/variants/tglrvp_up4
AgeCommit message (Expand)Author
2024-06-28mb/intel/tglrvp/dt: Make use of device alias namesFelix Singer
2024-02-19soc/intel/tigerlake: Drop redundant PcieRpEnableNico Huber
2024-01-24mb/hp to mb/kontron: Rename Makefiles from .inc to .mkMartin Roth
2022-05-05soc/intel/tigerlake: Add enum for `DdiPortXConfig`Angel Pons
2022-04-07ChromeOS: Add DECLARE_x_CROS_GPIOS()Kyösti Mälkki
2022-01-14soc/intel/tgl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik
2022-01-14soc/intel/tigerlake: add devicetree option PcieRpSlotImplementedMichael Niewöhner
2021-12-23mb: Add space before closing comment block keywordPaul Menzel
2021-12-23drivers/intel/pmc_mux/conn: Change usb{23}_port_number fields to device pointersReka Norman
2021-12-09soc/intel/tigerlake: Hook up DPTF device to devicetreeFelix Singer
2021-12-09soc/intel/tigerlake: Hook up SMBus device to devicetreeFelix Singer
2021-11-11ChromeOS: Replace with or add <types.h>Kyösti Mälkki
2021-11-09ChromeOS: Fix <vc/google/chromeos/chromeos.h>Kyösti Mälkki
2021-08-28soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer
2021-08-16mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cbMAULIK V VAGHELA
2021-08-16mb/*/{tglrvp,volteer,deltaur}: Remove hardcoding of BSP APIC IDMAULIK V VAGHELA
2021-07-08mb/intel/tglrvp: Update Power Limit2 minimum valueSumeet Pawnikar
2021-03-15mb/intel/tglrvp: Enable RTD3 for WWANBora Guvendik
2021-03-15mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flagCliff Huang
2021-02-11src: Remove unused <arch/cpu.h>Elyes HAOUAS
2021-01-25soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driverFurquan Shaikh
2021-01-21mb/intel/tglrvp: do UART pad config at board-levelMichael Niewöhner
2020-12-14mb/intel/tglrvp: Enable CNVi Bluetooth for UP4Bora Guvendik
2020-11-02mb, soc/intel: Reorganize CNVi device entries in devicetreeFurquan Shaikh
2020-10-30tigerlake mainboards: switch to devtree aliases for PMC MUX connectorsTim Wawrzynczak
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-14mb/intel/tglrvp: Enable Pcie WWAN m.2Bora Guvendik
2020-10-13mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devicesFurquan Shaikh
2020-10-12mb/intel/tglrvp: Add support of TPM over SPIShaunak Saha
2020-10-01mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays...Jason Le
2020-09-28mb/intel/tglrvp: Add DTT support for tglrvpSumeet R Pawnikar
2020-09-23mb/intel/tglrvp: Enable Intel Speed Shift Technology for Tigerlake RVPShreesh Chhabbi
2020-09-21mb/intel/tglrvp: Enable HECI interfaceJamie Ryu
2020-09-06mb/*: devicetree: drop now unneeded USBx_PORT_EMPTYMichael Niewöhner
2020-08-21mb/intel/tglrvp: Disable TBT_PCIE3 for UP4John Zhao
2020-08-13mb/intel/tglrvp: Set gpio GPP_H1 for soundcard detectionShaunak Saha
2020-08-12mb/intel/tglrvp: Add interrupt _CRS under CREC scopeJohn Zhao
2020-08-04mb/**/{devicetree,overridetree}.cb: Indent with tabsAngel Pons
2020-07-29mb/intel/tglrvp: Update TCSS D3Hot and D3Cold configurationJohn Zhao
2020-07-29mb/intel/tglrvp: Add support for USB Type-C connector device propertiesJohn Zhao
2020-07-28mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up4John Zhao
2020-07-12mb/intel/tglrvp: Enable s0ix for tglrvp up3 and up4John Zhao
2020-07-12mb/intel/tglrvp: Enable CpuReplacementCheckJamie Ryu
2020-07-09mainboard/intel/tglrvp: Remove unused PrmrrSize chip configSubrata Banik
2020-06-06mb/intel/tglrvp: Add support for RT 1308Shaunak Saha
2020-06-02mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllersJohn Zhao
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-26mb/intel/tglrvp: Enable D3HotEnable and D3ColdEnable for tglrvpJohn Zhao
2020-05-20soc/intel/tigerlake: Move PMC PCI resources under PMC deviceTim Wawrzynczak
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-04-20soc/intel/tigerlake: Update iDisp Link UPD settingsSrinidhi N Kaushik
2020-04-20mb/tglrvp: Configure intel common configWonkyu Kim
2020-04-14mb/intel/tglrvp : Enable RP LTRWonkyu Kim
2020-04-10src/mb: Remove unneeded spaces before/after tabsElyes HAOUAS
2020-04-06mainboard/intel: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-03-30tgl boards: Configure retimer Aux orientationBrandon Breitenstein
2020-03-30mb/tglrvp: Add GPE configurationShaunak Saha
2020-03-23mb/tglrvp: Update Audio AIC settings for Tiger LakeSrinidhi N Kaushik
2020-03-18mainboard/[g-p]*: Remove copyright noticesPatrick Georgi
2020-03-16mb/intel/tglrvp: Enable ISH driver and register firmware nameli feng
2020-03-14mb/intel/tglrvp: Update GPIO settingWonkyu Kim
2020-03-11mb/intel/tglrvp: Enable Hybrid storage modeWonkyu Kim
2020-03-11mb/intel/tglrvp: sync up variant folders with latest up3Wonkyu Kim
2020-03-10mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generationSrinidhi N Kaushik
2020-03-09mb/intel/tglrvp: Add memory config for Tiger Lake UP4Srinidhi N Kaushik
2020-03-09mb/intel/tglrvp: Add TGL UP4 RVPWonkyu Kim