coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-01-24	mb/hp to mb/kontron: Rename Makefiles from .inc to .mk	Martin Roth
2022-05-05	soc/intel/tigerlake: Add enum for `DdiPortXConfig`	Angel Pons
2022-04-07	ChromeOS: Add DECLARE_x_CROS_GPIOS()	Kyösti Mälkki
2022-01-14	soc/intel/tgl: Replace dt `HeciEnabled` by `HECI1 disable` config	Subrata Banik
2022-01-14	soc/intel/tigerlake: add devicetree option PcieRpSlotImplemented	Michael Niewöhner
2021-12-23	mb: Add space before closing comment block keyword	Paul Menzel
2021-12-23	drivers/intel/pmc_mux/conn: Change usb{23}_port_number fields to device pointers	Reka Norman
2021-12-09	soc/intel/tigerlake: Hook up DPTF device to devicetree	Felix Singer
2021-12-09	soc/intel/tigerlake: Hook up SMBus device to devicetree	Felix Singer
2021-11-11	ChromeOS: Replace with or add <types.h>	Kyösti Mälkki
2021-11-09	ChromeOS: Fix <vc/google/chromeos/chromeos.h>	Kyösti Mälkki
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-08-16	mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cb	MAULIK V VAGHELA
2021-08-16	mb/*/{tglrvp,volteer,deltaur}: Remove hardcoding of BSP APIC ID	MAULIK V VAGHELA
2021-07-08	mb/intel/tglrvp: Update Power Limit2 minimum value	Sumeet Pawnikar
2021-03-15	mb/intel/tglrvp: Enable RTD3 for WWAN	Bora Guvendik
2021-03-15	mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flag	Cliff Huang
2021-02-11	src: Remove unused <arch/cpu.h>	Elyes HAOUAS
2021-01-25	soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver	Furquan Shaikh
2021-01-21	mb/intel/tglrvp: do UART pad config at board-level	Michael Niewöhner
2020-12-14	mb/intel/tglrvp: Enable CNVi Bluetooth for UP4	Bora Guvendik
2020-11-02	mb, soc/intel: Reorganize CNVi device entries in devicetree	Furquan Shaikh
2020-10-30	tigerlake mainboards: switch to devtree aliases for PMC MUX connectors	Tim Wawrzynczak
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-14	mb/intel/tglrvp: Enable Pcie WWAN m.2	Bora Guvendik
2020-10-13	mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devices	Furquan Shaikh
2020-10-12	mb/intel/tglrvp: Add support of TPM over SPI	Shaunak Saha
2020-10-01	mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays...	Jason Le
2020-09-28	mb/intel/tglrvp: Add DTT support for tglrvp	Sumeet R Pawnikar
2020-09-23	mb/intel/tglrvp: Enable Intel Speed Shift Technology for Tigerlake RVP	Shreesh Chhabbi
2020-09-21	mb/intel/tglrvp: Enable HECI interface	Jamie Ryu
2020-09-06	mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY	Michael Niewöhner
2020-08-21	mb/intel/tglrvp: Disable TBT_PCIE3 for UP4	John Zhao
2020-08-13	mb/intel/tglrvp: Set gpio GPP_H1 for soundcard detection	Shaunak Saha
2020-08-12	mb/intel/tglrvp: Add interrupt _CRS under CREC scope	John Zhao
2020-08-04	mb/**/{devicetree,overridetree}.cb: Indent with tabs	Angel Pons
2020-07-29	mb/intel/tglrvp: Update TCSS D3Hot and D3Cold configuration	John Zhao
2020-07-29	mb/intel/tglrvp: Add support for USB Type-C connector device properties	John Zhao
2020-07-28	mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up4	John Zhao
2020-07-12	mb/intel/tglrvp: Enable s0ix for tglrvp up3 and up4	John Zhao
2020-07-12	mb/intel/tglrvp: Enable CpuReplacementCheck	Jamie Ryu
2020-07-09	mainboard/intel/tglrvp: Remove unused PrmrrSize chip config	Subrata Banik
2020-06-06	mb/intel/tglrvp: Add support for RT 1308	Shaunak Saha
2020-06-02	mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllers	John Zhao
2020-05-26	soc/intel/tigerlake: Disable VMD	Wonkyu Kim
2020-05-26	mb/intel/tglrvp: Enable D3HotEnable and D3ColdEnable for tglrvp	John Zhao
2020-05-20	soc/intel/tigerlake: Move PMC PCI resources under PMC device	Tim Wawrzynczak
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-06	soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel	Shaunak Saha
2020-04-20	soc/intel/tigerlake: Update iDisp Link UPD settings	Srinidhi N Kaushik
2020-04-20	mb/tglrvp: Configure intel common config	Wonkyu Kim
2020-04-14	mb/intel/tglrvp : Enable RP LTR	Wonkyu Kim
2020-04-10	src/mb: Remove unneeded spaces before/after tabs	Elyes HAOUAS
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-02	soc/intel/tigerlake: Reorganize memory initialization support	Furquan Shaikh
2020-03-30	tgl boards: Configure retimer Aux orientation	Brandon Breitenstein
2020-03-30	mb/tglrvp: Add GPE configuration	Shaunak Saha
2020-03-23	mb/tglrvp: Update Audio AIC settings for Tiger Lake	Srinidhi N Kaushik
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-03-16	mb/intel/tglrvp: Enable ISH driver and register firmware name	li feng
2020-03-14	mb/intel/tglrvp: Update GPIO setting	Wonkyu Kim
2020-03-11	mb/intel/tglrvp: Enable Hybrid storage mode	Wonkyu Kim
2020-03-11	mb/intel/tglrvp: sync up variant folders with latest up3	Wonkyu Kim
2020-03-10	mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generation	Srinidhi N Kaushik
2020-03-09	mb/intel/tglrvp: Add memory config for Tiger Lake UP4	Srinidhi N Kaushik
2020-03-09	mb/intel/tglrvp: Add TGL UP4 RVP	Wonkyu Kim