coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-06-06	mb/intel/tglrvp: Add support for RT 1308	Shaunak Saha
2020-06-02	mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllers	John Zhao
2020-05-26	soc/intel/tigerlake: Disable VMD	Wonkyu Kim
2020-05-26	mb/intel/tglrvp: Enable D3HotEnable and D3ColdEnable for tglrvp	John Zhao
2020-05-20	soc/intel/tigerlake: Move PMC PCI resources under PMC device	Tim Wawrzynczak
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-06	soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel	Shaunak Saha
2020-04-20	soc/intel/tigerlake: Update iDisp Link UPD settings	Srinidhi N Kaushik
2020-04-20	mb/tglrvp: Configure intel common config	Wonkyu Kim
2020-04-14	mb/intel/tglrvp : Enable RP LTR	Wonkyu Kim
2020-04-10	src/mb: Remove unneeded spaces before/after tabs	Elyes HAOUAS
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-02	soc/intel/tigerlake: Reorganize memory initialization support	Furquan Shaikh
2020-03-30	tgl boards: Configure retimer Aux orientation	Brandon Breitenstein
2020-03-30	mb/tglrvp: Add GPE configuration	Shaunak Saha
2020-03-23	mb/tglrvp: Update Audio AIC settings for Tiger Lake	Srinidhi N Kaushik
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-03-16	mb/intel/tglrvp: Enable ISH driver and register firmware name	li feng
2020-03-15	mb/intel/tglrvp: Enable CNVi in devicetree for Tiger Lake UP3	Srinidhi N Kaushik
2020-03-14	mb/intel/tglrvp: Update GPIO setting	Wonkyu Kim
2020-03-11	mb/intel/tglrvp: Enable Hybrid storage mode	Wonkyu Kim
2020-03-10	mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generation	Srinidhi N Kaushik
2020-03-07	mb/intel/tglrvp: Add pin mux for Camera	Wonkyu Kim
2020-03-07	mb/intel/tglrvp: Update display ports for RVP	Wonkyu Kim
2020-03-06	mb/intel/tglrvp: Enable Audio AIC with Max98373 & ALC5682 on TGL	Srinidhi N Kaushik
2020-02-26	mb/intel/tglrvp: add Tiger Lake memory initialization support	Srinidhi N Kaushik
2020-02-05	mb/intel/tglrvp: pin mux for ISH	Wonkyu Kim
2020-01-29	mb/intel/tglrvp: pin mux for image clocks	Wonkyu Kim
2020-01-28	mb/intel/tglrvp: Enable DP ports for TGLRVP	Wonkyu Kim
2020-01-27	mb/intel/tglrvp: Enable MIPI camera	Wonkyu Kim
2020-01-25	mb/intel/tglrvp: Enable rp11 for optane	Wonkyu Kim
2020-01-25	soc/intel/tigerlake: Fix GPIO communities	Shaunak Saha
2020-01-24	mb/intel/tglrvp: Enable SATA	Wonkyu Kim
2020-01-18	mb/intel/tglrvp: Update tglrvp_up3 devicetree	Ravi Sarawadi
2020-01-17	mb/tglrvp: update gpio pin mux for NVMe	Wonkyu Kim
2020-01-14	mb/intel/tglrvp: Add initial mainboard code	Ravi Sarawadi