diff options
| author | Wonkyu Kim <wonkyu.kim@intel.com> | 2019-12-19 19:27:34 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-27 07:41:57 +0000 |
| commit | f93c157a93ca568167b7bc6474361293e360c20f (patch) | |
| tree | 9f66741a8630dd35e9ec1759afdcd5e0e5aee7df /src/mainboard/intel/tglrvp/variants/tglrvp_up3 | |
| parent | 161df738a7894f5639262a060860516a1208dfdb (diff) | |
mb/intel/tglrvp: Enable MIPI camera
Add MIPI camera ACPI
Update GPIO pin mux for camera
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board and check camera
Simple test method to check camera: capture image by below commands from
OS console
>media-ctl -V "\"Intel IPU6 CSI-2 5\":0 [fmt:SGRBG10/3280x2464]"
>media-ctl -V "\"Intel IPU6 CSI-2 5\":1 [fmt:SGRBG10/3280x2464]"
>media-ctl -l "\"ov8856 18-0010\":0 -> \"Intel IPU6 CSI-2 5\":0[1]"
>media-ctl -V "\"Intel IPU6 CSI2 BE\":0 [fmt:SGRBG10/3280x2464]"
>media-ctl -V "\"Intel IPU6 CSI2 BE\":1 [crop:(0,0)/3280x2464]"
>media-ctl -V "\"Intel IPU6 CSI2 BE\":1 [fmt:SGRBG10/3280x2464]"
>media-ctl -l "\"Intel IPU6 CSI-2 5\":1 -> \"Intel IPU6 CSI2 BE\":0[1]"
>media-ctl -l "\"Intel IPU6 CSI2 BE\":1 -> \"Intel IPU6 CSI2 BE capture\":0[1]"
>yavta -u -c5 -n5 -I -s 3280x2464 --file=/tmp/frame-#.bin -f SGRBG10
$(media-ctl -e "Intel IPU6 CSI2 BE capture")
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37863
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/tglrvp/variants/tglrvp_up3')
| -rw-r--r-- | src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 465e402560..69bb931611 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -22,6 +22,12 @@ static const struct pad_config gpio_table[] = { /* PCH M.2 SSD */ PAD_CFG_GPO(GPP_B16, 1, PLTRST), PAD_CFG_GPO(GPP_H0, 1, PLTRST), + + /* Camera */ + PAD_CFG_GPO(GPP_B23, 0, PLTRST), + PAD_CFG_GPO(GPP_C15, 0, PLTRST), + PAD_CFG_GPO(GPP_R6, 0, PLTRST), + PAD_CFG_GPO(GPP_H12, 0, PLTRST), }; /* Early pad configuration in bootblock */ |