coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-10-29	mb/google/brya/var/brask: Correct the GPIO config of buzzer	Alan Huang
2021-10-27	mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting	David Wu
2021-10-04	mb/*/brya/variants/brask: Enable dynamic GPIO PM	Meera Ravindranath
2021-10-04	mb/google/brya: Enable DDR4 SODIMM for brask	David Wu
2021-10-01	mb/google/brask: Correct SSD power sequence	Eric Lai
2021-10-01	mb/google/brask/var/baseboard/brask: Update GPIO GPP_B5 and GPP_B6	David Wu
2021-09-16	mb/google/brya: Update state of BB_RT_FORCE_PWR gpios	Tim Wawrzynczak
2021-09-15	mb/google/brya: Add support for romstage GPIO table	Tim Wawrzynczak
2021-09-11	mb/google/brya: Replace white space with tab	Subrata Banik
2021-09-02	mb/google/brya/variants/brask: Enable PCIE port 7 for Ethernet	David Wu
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-08-10	mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cb	MAULIK V VAGHELA
2021-08-10	mb/*/brya/adlrvp: Remove hardcoding of BSP APIC ID	MAULIK V VAGHELA
2021-08-03	mb/google/brya: Introduce new baseboard brask	Zhuohao Lee