diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/beltino/bootblock.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/beltino/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/google/beltino/onboard.h | 2 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/bootblock.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/devicetree.cb | 10 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/onboard.h | 2 | ||||
| -rw-r--r-- | src/mainboard/protectli/vault_kbl/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/early_init.c | 16 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/smihandler.c | 6 | ||||
| -rw-r--r-- | src/superio/ite/common/early_serial.c | 21 | ||||
| -rw-r--r-- | src/superio/ite/common/ite.h | 1 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/Kconfig | 6 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/chip.h | 32 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/early_init.c | 20 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/it8772f.h | 80 | ||||
| -rw-r--r-- | src/superio/ite/it8772f/superio.c | 179 |
17 files changed, 67 insertions, 326 deletions
diff --git a/src/mainboard/google/beltino/bootblock.c b/src/mainboard/google/beltino/bootblock.c index a68b03fdf2..4139e383a7 100644 --- a/src/mainboard/google/beltino/bootblock.c +++ b/src/mainboard/google/beltino/bootblock.c @@ -9,7 +9,7 @@ void mainboard_config_superio(void) { /* Early SuperIO setup */ ite_kill_watchdog(IT8772F_GPIO_DEV); - it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV); + ite_ac_resume_southbridge(IT8772F_EC_DEV); ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE); /* Turn on Power LED */ diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index cdaab35b54..d96ee118bc 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -81,9 +81,9 @@ chip northbridge/intel/haswell # Skip keyboard init register "skip_keyboard" = "true" # Enable PECI on TMPIN3 - register "peci_tmpin" = "3" + register "TMPIN3.mode" = "THERMAL_PECI" # Enable FAN2 - register "fan2_enable" = "true" + register "FAN2.mode" = "FAN_SMART_SOFTWARE" device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/google/beltino/onboard.h b/src/mainboard/google/beltino/onboard.h index 8bd21ce3d5..36295ece68 100644 --- a/src/mainboard/google/beltino/onboard.h +++ b/src/mainboard/google/beltino/onboard.h @@ -26,7 +26,7 @@ #define IT8772F_BASE 0x2e #define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1) #define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO) -#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0) +#define IT8772F_EC_DEV PNP_DEV(IT8772F_BASE, IT8772F_EC) #ifndef __ACPI__ void lan_init(void); diff --git a/src/mainboard/google/jecht/bootblock.c b/src/mainboard/google/jecht/bootblock.c index db590cf6b4..02b078eefe 100644 --- a/src/mainboard/google/jecht/bootblock.c +++ b/src/mainboard/google/jecht/bootblock.c @@ -8,7 +8,7 @@ void bootblock_mainboard_early_init(void) { /* Early SuperIO setup */ - it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV); + ite_ac_resume_southbridge(IT8772F_EC_DEV); ite_kill_watchdog(IT8772F_GPIO_DEV); ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb index 1bf8a2aefb..ba8167cda2 100644 --- a/src/mainboard/google/jecht/devicetree.cb +++ b/src/mainboard/google/jecht/devicetree.cb @@ -75,15 +75,13 @@ chip soc/intel/broadwell # Skip keyboard init register "skip_keyboard" = "true" # Enable PECI on TMPIN3 - register "peci_tmpin" = "3" - # Disable use of TMPIN1 - register "tmpin1_mode" = "0" + register "TMPIN3.mode" = "THERMAL_PECI" # Enable Thermal Diode on TMPIN2 - register "tmpin2_mode" = "1" + register "TMPIN2.mode" = "THERMAL_DIODE" # Enable FAN2 - register "fan2_enable" = "true" + register "FAN2.mode" = "FAN_SMART_SOFTWARE" # Default FAN2 speed - register "fan2_speed" = "0x4d" + register "FAN2.smart.pwm_start" = "30" device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h index a6ba80a7b3..ae68fb8583 100644 --- a/src/mainboard/google/jecht/onboard.h +++ b/src/mainboard/google/jecht/onboard.h @@ -35,7 +35,7 @@ enum { #define IT8772F_BASE 0x2e #define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1) #define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO) -#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0) +#define IT8772F_EC_DEV PNP_DEV(IT8772F_BASE, IT8772F_EC) /* Write Protect: GPIO58 = GPIO_SPI_WP, active high */ #define GPIO_SPI_WP 58 diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index 092115c335..87bc5de38b 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -209,9 +209,9 @@ chip soc/intel/skylake end device ref lpc_espi on chip superio/ite/it8772f - register "peci_tmpin" = "3" - register "tmpin1_mode" = "THERMAL_RESISTOR" - register "tmpin2_mode" = "THERMAL_RESISTOR" + register "TMPIN1.mode" = "THERMAL_RESISTOR" + register "TMPIN2.mode" = "THERMAL_RESISTOR" + register "TMPIN3.mode" = "THERMAL_PECI" # FAN2 available on fan header but unused device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index ae3aab5078..853e519263 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -88,9 +88,9 @@ chip northbridge/intel/sandybridge # Skip keyboard init register "skip_keyboard" = "true" # Enable PECI on TMPIN3 - register "peci_tmpin" = "3" + register "TMPIN3.mode" = "THERMAL_PECI" # Enable FAN3 - register "fan3_enable" = "true" + register "FAN3.mode" = "FAN_SMART_SOFTWARE" device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c index 681373c7d8..2719e337e2 100644 --- a/src/mainboard/samsung/stumpy/early_init.c +++ b/src/mainboard/samsung/stumpy/early_init.c @@ -12,9 +12,9 @@ #include <southbridge/intel/common/gpio.h> #include <superio/smsc/lpc47n207/lpc47n207.h> -#define SUPERIO_DEV PNP_DEV(0x2e, 0) #define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1) -#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) +#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) +#define EC_DEV PNP_DEV(0x2e, IT8772F_EC) void mainboard_late_rcba_config(void) { @@ -58,17 +58,17 @@ static void setup_sio_gpios(void) * GPIO10 as USBPWRON12# * GPIO12 as USBPWRON13# */ - it8772f_gpio_setup(SUPERIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05); + it8772f_gpio_setup(GPIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05); /* * GPIO22 as wake SCI# */ - it8772f_gpio_setup(SUPERIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04); + it8772f_gpio_setup(GPIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04); /* * GPIO32 as EXTSMI# */ - it8772f_gpio_setup(SUPERIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04); + it8772f_gpio_setup(GPIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04); /* * GPIO45 as LED_POWER# @@ -82,8 +82,8 @@ static void setup_sio_gpios(void) * GPIO51 as USBPWRON8# * GPIO52 as USBPWRON1# */ - it8772f_gpio_setup(SUPERIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06); - it8772f_gpio_setup(SUPERIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00); + it8772f_gpio_setup(GPIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06); + it8772f_gpio_setup(GPIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00); } void mainboard_fill_pei_data(struct pei_data *pei_data) @@ -117,7 +117,7 @@ void bootblock_mainboard_early_init(void) setup_sio_gpios(); /* Early SuperIO setup */ - it8772f_ac_resume_southbridge(SUPERIO_DEV); + ite_ac_resume_southbridge(EC_DEV); ite_kill_watchdog(GPIO_DEV); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/samsung/stumpy/smihandler.c b/src/mainboard/samsung/stumpy/smihandler.c index 500008660f..f9b9d3b8db 100644 --- a/src/mainboard/samsung/stumpy/smihandler.c +++ b/src/mainboard/samsung/stumpy/smihandler.c @@ -9,7 +9,7 @@ /* Include for SIO helper functions */ #include <superio/ite/it8772f/it8772f.h> -#define SUPERIO_DEV PNP_DEV(0x2e, 0) +#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) /* * Change LED_POWER# (SIO GPIO 45) state based on sleep type. @@ -20,14 +20,14 @@ void mainboard_smi_sleep(u8 slp_typ) switch (slp_typ) { case ACPI_S3: case ACPI_S4: - it8772f_gpio_led(SUPERIO_DEV, 4 /* set */, (0x1 << 5) /* select */, + it8772f_gpio_led(GPIO_DEV, 4 /* set */, (0x1 << 5) /* select */, (0x1 << 5) /* polarity */, (0x1 << 5) /* 1 = pullup */, (0x1 << 5) /* output */, 0x00, /* 0 = Alternate function */ SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ); break; case ACPI_S5: - it8772f_gpio_led(SUPERIO_DEV, 4 /* set */, (0x1 << 5) /* select */, + it8772f_gpio_led(GPIO_DEV, 4 /* set */, (0x1 << 5) /* select */, 0x00 /* polarity: non-inverting */, 0x00 /* 0 = pulldown */, (0x1 << 5) /* output */, (0x1 << 5) /* 1 = Simple IO function */, SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ); diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c index 5ff403f497..552f1104ba 100644 --- a/src/superio/ite/common/early_serial.c +++ b/src/superio/ite/common/early_serial.c @@ -15,6 +15,7 @@ #define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */ #define ITE_CONFIG_REG_WDT_TIMEOUT_LSB 0x73 /* watchdog timeout (LSB) */ #define ITE_CONFIG_REG_WDT_TIMEOUT_MSB 0x74 /* watchdog timeout (MSB) */ +#define ITE_CONFIG_REG_APC_PME_CTL2 0xf4 /* APC_PME Control 2 */ /* Helper procedure */ static void ite_sio_write(pnp_devfn_t dev, u8 reg, u8 value) @@ -136,3 +137,23 @@ void ite_kill_watchdog(pnp_devfn_t dev) ite_sio_write(dev, ITE_CONFIG_REG_WDT_TIMEOUT_MSB, 0x00); pnp_exit_conf_state(dev); } + +/* + * Set AC resume to be up to the Southbridge + * pass EC_DEV + */ +void ite_ac_resume_southbridge(pnp_devfn_t dev) +{ + u8 tmp; + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + tmp = pnp_read_config(dev, ITE_CONFIG_REG_APC_PME_CTL2); + /* + * Set both + * 6: Gate Extra PWRON# Pulse + * 5: PSON# state when 3VSB switched to on + */ + tmp |= 0x60; + pnp_write_config(dev, ITE_CONFIG_REG_APC_PME_CTL2, tmp); + pnp_exit_conf_state(dev); +} diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h index 3e9b50289a..19ade4b9b6 100644 --- a/src/superio/ite/common/ite.h +++ b/src/superio/ite/common/ite.h @@ -17,6 +17,7 @@ void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value); void ite_enable_3vsbsw(pnp_devfn_t dev); void ite_delay_pwrgd3(pnp_devfn_t dev); void ite_kill_watchdog(pnp_devfn_t dev); +void ite_ac_resume_southbridge(pnp_devfn_t dev); void pnp_enter_conf_state(pnp_devfn_t dev); void pnp_exit_conf_state(pnp_devfn_t dev); diff --git a/src/superio/ite/it8772f/Kconfig b/src/superio/ite/it8772f/Kconfig index 194c73618a..3137cf0d35 100644 --- a/src/superio/ite/it8772f/Kconfig +++ b/src/superio/ite/it8772f/Kconfig @@ -3,3 +3,9 @@ config SUPERIO_ITE_IT8772F bool select SUPERIO_ITE_COMMON_PRE_RAM + select SUPERIO_ITE_ENV_CTRL + select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG + select SUPERIO_ITE_ENV_CTRL_8BIT_PWM + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN + select SUPERIO_ITE_ENV_CTRL_NO_FULLSPEED_SETTING + select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 diff --git a/src/superio/ite/it8772f/chip.h b/src/superio/ite/it8772f/chip.h index eb3ccd2a97..1169b4ba5d 100644 --- a/src/superio/ite/it8772f/chip.h +++ b/src/superio/ite/it8772f/chip.h @@ -3,12 +3,11 @@ #ifndef SUPERIO_ITE_IT8772F_CHIP_H #define SUPERIO_ITE_IT8772F_CHIP_H -#include <device/device.h> -#include <types.h> - -#include "it8772f.h" +#include <superio/ite/common/env_ctrl_chip.h> struct superio_ite_it8772f_config { + struct ite_ec_config ec; + /* GPIO SimpleIO register values via devicetree.cb */ u8 gpio_set1; u8 gpio_set2; @@ -18,31 +17,6 @@ struct superio_ite_it8772f_config { u8 gpio_set6; bool skip_keyboard; - - /* - * Enable external temperature sensor to use PECI GetTemp() - * command and store in register TMPIN 1, 2, or 3. - */ - u8 peci_tmpin; - - /* - * Enable thermal mode on tmpinx. - */ - enum thermal_mode tmpin1_mode; - enum thermal_mode tmpin2_mode; - - /* - * Enable a FAN for software control. - */ - bool fan1_enable; - bool fan2_enable; - bool fan3_enable; - - /* - * Default FAN speed - */ - u8 fan2_speed; - u8 fan3_speed; }; #endif /* SUPERIO_ITE_IT8772F_CHIP_H */ diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c index e41b206e8c..efbb035aab 100644 --- a/src/superio/ite/it8772f/early_init.c +++ b/src/superio/ite/it8772f/early_init.c @@ -5,10 +5,13 @@ #include <device/pnp_ops.h> #include "it8772f.h" +#include "../common/ite.h" + +#define IT8772F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ /* NOTICE: This file is deprecated, use ite/common instead */ -void it8772f_enter_conf(pnp_devfn_t dev) +static void it8772f_enter_conf(pnp_devfn_t dev) { u16 port = dev >> 8; @@ -18,27 +21,18 @@ void it8772f_enter_conf(pnp_devfn_t dev) outb((port == 0x4e) ? 0xaa : 0x55, port); } -void it8772f_exit_conf(pnp_devfn_t dev) +static void it8772f_exit_conf(pnp_devfn_t dev) { pnp_write_config(dev, IT8772F_CONFIG_REG_CC, 0x02); } -/* Set AC resume to be up to the Southbridge */ -void it8772f_ac_resume_southbridge(pnp_devfn_t dev) -{ - it8772f_enter_conf(dev); - pnp_write_config(dev, IT8772F_CONFIG_REG_LDN, IT8772F_EC); - pnp_write_config(dev, PNP_IDX_MSC4, 0x60); - it8772f_exit_conf(dev); -} - /* Configure a set of GPIOs */ void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup, u8 output, u8 enable) { set--; /* Set 1 is offset 0 */ it8772f_enter_conf(dev); - pnp_write_config(dev, IT8772F_CONFIG_REG_LDN, IT8772F_GPIO); + pnp_set_logical_device(dev); if (set < 5) { pnp_write_config(dev, GPIO_REG_SELECT(set), select); pnp_write_config(dev, GPIO_REG_ENABLE(set), enable); @@ -55,7 +49,7 @@ void it8772f_gpio_led(pnp_devfn_t dev,int set, u8 select, u8 polarity, u8 pullup { set--; /* Set 1 is offset 0 */ it8772f_enter_conf(dev); - pnp_write_config(dev, IT8772F_CONFIG_REG_LDN, IT8772F_GPIO); + pnp_set_logical_device(dev); if (set < 5) { pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_PINMAP, led_pin_map); pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_CONTROL, led_freq); diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h index 38cfe3b20e..4df21c58cb 100644 --- a/src/superio/ite/it8772f/it8772f.h +++ b/src/superio/ite/it8772f/it8772f.h @@ -3,13 +3,6 @@ #ifndef SUPERIO_ITE_IT8772F_H #define SUPERIO_ITE_IT8772F_H -/* Supported thermal mode on TMPINx */ -enum thermal_mode { - THERMAL_MODE_DISABLED = 0, - THERMAL_DIODE, - THERMAL_RESISTOR, -}; - #define IT8772F_FDC 0x00 /* Floppy disk controller */ #define IT8772F_SP1 0x01 /* Com1 */ #define IT8772F_EC 0x04 /* Environment controller */ @@ -18,71 +11,6 @@ enum thermal_mode { #define IT8772F_GPIO 0x07 /* GPIO */ #define IT8772F_IR 0x0a /* Consumer IR */ -/* Environmental Controller interface */ -#define IT8772F_CONFIGURATION 0x00 -#define IT8772F_INTERFACE_SELECT 0x0a -#define IT8772F_INTERFACE_PSEUDO_EOC (1 << 7) -#define IT8772F_INTERFACE_SMB_ENABLE (1 << 6) -#define IT8772F_INTERFACE_SEL_DISABLE (0 << 4) -#define IT8772F_INTERFACE_SEL_SST_SLAVE (1 << 4) -#define IT8772F_INTERFACE_SEL_PECI (2 << 4) -#define IT8772F_INTERFACE_SEL_SST_HOST (3 << 4) -#define IT8772F_INTERFACE_CLOCK_32MHZ (0 << 3) -#define IT8772F_INTERFACE_CLOCK_24MHZ (1 << 3) -#define IT8772F_INTERFACE_SPEED_TOLERANCE (1 << 2) -#define IT8772F_INTERFACE_PECI_AWFCS (1 << 0) -#define IT8772F_FAN_TAC2_READ 0x0e -#define IT8772F_FAN_TAC3_READ 0x0f -#define IT8772F_FAN_MAIN_CTL 0x13 -#define IT8772F_FAN_MAIN_CTL_TAC_SMART(x) (1 << ((x)-1)) -#define IT8772F_FAN_MAIN_CTL_TAC_EN(x) (1 << ((x)+3)) -#define IT8772F_FAN_CTL_MODE 0x14 -#define IT8772F_FAN_CTL_ON(x) (1 << ((x)-1)) -#define IT8772F_FAN_PWM_MIN_DUTY (1 << 3) -#define IT8772F_FAN_PWM_CLOCK_48MHZ (0 << 4) -#define IT8772F_FAN_PWM_CLOCK_24MHZ (1 << 4) -#define IT8772F_FAN_PWM_CLOCK_8MHZ (3 << 4) -#define IT8772F_FAN_PWM_CLOCK_6MHZ (4 << 4) -#define IT8772F_FAN_PWM_CLOCK_3MHZ (5 << 4) -#define IT8772F_FAN_PWM_CLOCK_1_5MHZ (6 << 4) -#define IT8772F_FAN_PWM_CLOCK_51KHZ (7 << 4) -#define IT8772F_FAN_CTL_POLARITY_LOW (0 << 7) -#define IT8772F_FAN_CTL_POLARITY_HIGH (1 << 7) -#define IT8772F_FAN_CTL2_PWM_MODE 0x16 -#define IT8772F_FAN_CTL3_PWM_MODE 0x17 -#define IT8772F_FAN_CTL_PWM_MODE_SOFTWARE (0 << 7) -#define IT8772F_FAN_CTL_PWM_MODE_AUTOMATIC (1 << 7) -#define IT8772F_ADC_TEMP_CHANNEL_ENABLE 0x51 -#define IT8772F_FAN_CTL2_PWM_START 0x6b -#define IT8772F_FAN_CTL2_AUTO_MODE 0x6c -#define IT8772F_FAN_CTL3_PWM_START 0x73 -#define IT8772F_FAN_CTL3_AUTO_MODE 0x74 -#define IT8772F_FAN_CTL_AUTO_SMOOTHING_DIS (0 << 7) -#define IT8772F_FAN_CTL_AUTO_SMOOTHING_EN (1 << 7) -#define IT8772F_EXTEMP_STATUS 0x88 -#define IT8772F_EXTEMP_STATUS_HOST_BUSY (1 << 0) -#define IT8772F_EXTEMP_ADDRESS 0x89 -#define IT8772F_EXTEMP_WRITE_LENGTH 0x8a -#define IT8772F_EXTEMP_READ_LENGTH 0x8b -#define IT8772F_EXTEMP_COMMAND 0x8c -#define IT8772F_EXTEMP_WRITE_DATA_2 0x8d -#define IT8772F_EXTEMP_CONTROL 0x8e -#define IT8772F_EXTEMP_CONTROL_AUTO_32HZ (0 << 6) -#define IT8772F_EXTEMP_CONTROL_AUTO_16HZ (1 << 6) -#define IT8772F_EXTEMP_CONTROL_AUTO_8HZ (2 << 6) -#define IT8772F_EXTEMP_CONTROL_AUTO_4HZ (3 << 6) -#define IT8772F_EXTEMP_CONTROL_AUTO_START (1 << 5) -#define IT8772F_EXTEMP_CONTROL_AUTO_ABORT (1 << 4) -#define IT8772F_EXTEMP_CONTROL_AUTO_TWO_DOMAIN (1 << 3) -#define IT8772F_EXTEMP_CONTROL_CONTENTION (1 << 2) -#define IT8772F_EXTEMP_CONTROL_SST_IDLE_HIGH (1 << 1) -#define IT8772F_EXTEMP_CONTROL_START (1 << 0) - -/* Standard PECI GetTemp */ -#define PECI_CLIENT_ADDRESS 0x30 -#define PECI_GETTEMP_COMMAND 0x01 -#define PECI_GETTEMP_WRITE_LENGTH 0x01 -#define PECI_GETTEMP_READ_LENGTH 0x02 /* GPIO interface */ #define IT8772F_GPIO_LED_BLINK1_PINMAP 0xf8 @@ -115,17 +43,9 @@ enum thermal_mode { #include <device/pnp_type.h> #include <stdint.h> -void it8772f_ac_resume_southbridge(pnp_devfn_t dev); void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup, u8 output, u8 enable); -/* FIXME: should be static so will be removed later.. */ -/* Global configuration registers. */ -#define IT8772F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ -#define IT8772F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ - -void it8772f_enter_conf(pnp_devfn_t dev); -void it8772f_exit_conf(pnp_devfn_t dev); void it8772f_gpio_led(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup, u8 output, u8 enable, u8 led_pin_map, u8 led_freq); diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index 177136818c..268df0a517 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -4,6 +4,7 @@ #include <device/pnp.h> #include <console/console.h> #include <pc80/keyboard.h> +#include <superio/ite/common/env_ctrl.h> #include <arch/io.h> #include <delay.h> #include <superio/conf_mode.h> @@ -12,155 +13,6 @@ #include "chip.h" /* FIXME */ #include "it8772f.h" -/* FIXME: see if the common ITE environment controller code can be used here */ - -static void it8772f_extemp_force_idle_status(struct resource *res) -{ - u8 reg; - int retries = 10; - - /* Wait up to 10ms for non-busy state. */ - while (retries > 0) { - reg = pnp_read_hwm5_index(res->base, IT8772F_EXTEMP_STATUS); - - if ((reg & IT8772F_EXTEMP_STATUS_HOST_BUSY) == 0x0) - break; - - retries--; - - mdelay(1); - } - - if (retries == 0 && (reg & IT8772F_EXTEMP_STATUS_HOST_BUSY) == 0x1) { - /* - * SIO is busy due to unfinished peci transaction. - * Re-configure Register 0x8E to terminate processes. - */ - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_CONTROL, - IT8772F_EXTEMP_CONTROL_AUTO_4HZ | - IT8772F_EXTEMP_CONTROL_AUTO_START); - } -} - -/* - * Setup External Temperature to read via PECI into TMPINx register - */ -static void it8772f_enable_peci(struct resource *res, int tmpin) -{ - if (tmpin < 1 || tmpin > 3) - return; - - /* Enable PECI interface */ - pnp_write_hwm5_index(res->base, IT8772F_INTERFACE_SELECT, - IT8772F_INTERFACE_SEL_PECI | - IT8772F_INTERFACE_SPEED_TOLERANCE); - - /* Setup External Temperature using PECI GetTemp */ - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_ADDRESS, - PECI_CLIENT_ADDRESS); - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_COMMAND, - PECI_GETTEMP_COMMAND); - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_WRITE_LENGTH, - PECI_GETTEMP_WRITE_LENGTH); - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_READ_LENGTH, - PECI_GETTEMP_READ_LENGTH); - pnp_write_hwm5_index(res->base, IT8772F_EXTEMP_CONTROL, - IT8772F_EXTEMP_CONTROL_AUTO_4HZ | - IT8772F_EXTEMP_CONTROL_AUTO_START); - - /* External Temperature reported in TMPINx register */ - pnp_write_hwm5_index(res->base, IT8772F_ADC_TEMP_CHANNEL_ENABLE, - (tmpin & 3) << 6); -} - -/* - * Set up External Temperature to read via thermal diode/resistor - * into TMPINx register - */ -static void it8772f_enable_tmpin(struct resource *res, int tmpin, - enum thermal_mode mode) -{ - u8 reg; - - if (tmpin != 1 && tmpin != 2) - return; - - reg = pnp_read_hwm5_index(res->base, IT8772F_ADC_TEMP_CHANNEL_ENABLE); - - switch (mode) { - case THERMAL_DIODE: - /* Thermal Diode Mode */ - pnp_write_hwm5_index(res->base, IT8772F_ADC_TEMP_CHANNEL_ENABLE, - reg | tmpin); - break; - case THERMAL_RESISTOR: - /* Thermal Resistor Mode */ - pnp_write_hwm5_index(res->base, IT8772F_ADC_TEMP_CHANNEL_ENABLE, - reg | (tmpin << 3)); - break; - default: - printk(BIOS_ERR, "Unsupported thermal mode 0x%x on TMPIN%d\n", - mode, tmpin); - return; - } - - reg = pnp_read_hwm5_index(res->base, IT8772F_CONFIGURATION); - - /* Enable the startup of monitoring operation */ - pnp_write_hwm5_index(res->base, IT8772F_CONFIGURATION, reg | 0x01); -} - -/* - * Setup a FAN PWM interface for software control - */ -static void it8772f_enable_fan(struct resource *res, int fan, u8 fan_speed) -{ - u8 reg; - - if (fan < 1 || fan > 3) - return; - - /* Enable 6MHz (23.43kHz PWM) active high output */ - reg = pnp_read_hwm5_index(res->base, IT8772F_FAN_CTL_MODE); - reg |= IT8772F_FAN_CTL_ON(fan) | - IT8772F_FAN_PWM_CLOCK_6MHZ | - IT8772F_FAN_CTL_POLARITY_HIGH; - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL_MODE, reg); - - /* Enable output in smart mode */ - reg = pnp_read_hwm5_index(res->base, IT8772F_FAN_MAIN_CTL); - reg |= IT8772F_FAN_MAIN_CTL_TAC_SMART(fan); - reg |= IT8772F_FAN_MAIN_CTL_TAC_EN(fan); - pnp_write_hwm5_index(res->base, IT8772F_FAN_MAIN_CTL, reg); - - switch (fan) { - case 2: - /* Enable software operation */ - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL2_PWM_MODE, - IT8772F_FAN_CTL_PWM_MODE_SOFTWARE); - /* Disable Smoothing */ - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL2_AUTO_MODE, - IT8772F_FAN_CTL_AUTO_SMOOTHING_DIS); - /* Set a default fan speed */ - if (fan_speed) - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL2_PWM_START, - fan_speed); - break; - case 3: - /* Enable software operation */ - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL3_PWM_MODE, - IT8772F_FAN_CTL_PWM_MODE_SOFTWARE); - /* Disable Smoothing */ - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL3_AUTO_MODE, - IT8772F_FAN_CTL_AUTO_SMOOTHING_DIS); - /* Set a default fan speed */ - if (fan_speed) - pnp_write_hwm5_index(res->base, IT8772F_FAN_CTL3_PWM_START, - fan_speed); - break; - } -} - static void it8772f_init(struct device *dev) { struct superio_ite_it8772f_config *conf = dev->chip_info; @@ -172,34 +24,9 @@ static void it8772f_init(struct device *dev) switch (dev->path.pnp.device) { case IT8772F_EC: res = probe_resource(dev, PNP_IDX_IO0); - if (!res) + if (!conf || !res) break; - - /* Enable PECI if configured */ - it8772f_enable_peci(res, conf->peci_tmpin); - - /* Enable HWM if configured */ - if (conf->tmpin1_mode != THERMAL_MODE_DISABLED) - it8772f_enable_tmpin(res, 1, conf->tmpin1_mode); - if (conf->tmpin2_mode != THERMAL_MODE_DISABLED) - it8772f_enable_tmpin(res, 2, conf->tmpin2_mode); - - /* Enable FANx if configured */ - if (conf->fan1_enable) - it8772f_enable_fan(res, 1, 0); - if (conf->fan2_enable) - it8772f_enable_fan(res, 2, - conf->fan2_speed ? conf->fan2_speed : 0x80); - if (conf->fan3_enable) - it8772f_enable_fan(res, 3, - conf->fan3_speed ? conf->fan3_speed : 0x80); - - /* - * System may get wrong temperature data when SIO is in - * busy state. Therefore, check the status and terminate - * processes if needed. - */ - it8772f_extemp_force_idle_status(res); + ite_ec_init(res->base, &conf->ec); break; case IT8772F_GPIO: /* Set GPIO output levels */ |