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authorFelix Held <felix-coreboot@felixheld.de>2023-03-25 03:02:52 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-29 16:19:03 +0000
commite91392a5fe28eeb23e1791de15c31c3f5c8a6a82 (patch)
tree472b7897cd15dfc11a597762d1be82168f1da588 /src/soc
parent3ee7453e0e0892631df0e629cdb93f07ee67e645 (diff)
soc/amd/common/acpi/cpu_power_state: factor out get_visible_pstate_count
Factor out the MSR access into a function with a more descriptive name. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I331c3205390edcbd8749b2d52b7cc7ac3a8ced5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/74020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/acpi/cpu_power_state.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/acpi/cpu_power_state.c b/src/soc/amd/common/block/acpi/cpu_power_state.c
index d518ea082e..2cfc3cb57c 100644
--- a/src/soc/amd/common/block/acpi/cpu_power_state.c
+++ b/src/soc/amd/common/block/acpi/cpu_power_state.c
@@ -46,6 +46,11 @@ static uint32_t get_pstate_core_power(union pstate_msr pstate_reg)
return power_in_mw;
}
+static uint32_t get_visible_pstate_count(void)
+{
+ return (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT;
+}
+
/*
* Populate structure describing enabled p-states and return count of enabled p-states.
*/
@@ -57,7 +62,7 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values,
uint32_t max_pstate;
pstate_count = 0;
- max_pstate = (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT;
+ max_pstate = get_visible_pstate_count();
for (pstate = 0; pstate <= max_pstate; pstate++) {
pstate_reg.raw = rdmsr(PSTATE_MSR(pstate)).raw;