From e91392a5fe28eeb23e1791de15c31c3f5c8a6a82 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 25 Mar 2023 03:02:52 +0100 Subject: soc/amd/common/acpi/cpu_power_state: factor out get_visible_pstate_count Factor out the MSR access into a function with a more descriptive name. Signed-off-by: Felix Held Change-Id: I331c3205390edcbd8749b2d52b7cc7ac3a8ced5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/74020 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/acpi/cpu_power_state.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/soc') diff --git a/src/soc/amd/common/block/acpi/cpu_power_state.c b/src/soc/amd/common/block/acpi/cpu_power_state.c index d518ea082e..2cfc3cb57c 100644 --- a/src/soc/amd/common/block/acpi/cpu_power_state.c +++ b/src/soc/amd/common/block/acpi/cpu_power_state.c @@ -46,6 +46,11 @@ static uint32_t get_pstate_core_power(union pstate_msr pstate_reg) return power_in_mw; } +static uint32_t get_visible_pstate_count(void) +{ + return (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT; +} + /* * Populate structure describing enabled p-states and return count of enabled p-states. */ @@ -57,7 +62,7 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values, uint32_t max_pstate; pstate_count = 0; - max_pstate = (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT; + max_pstate = get_visible_pstate_count(); for (pstate = 0; pstate <= max_pstate; pstate++) { pstate_reg.raw = rdmsr(PSTATE_MSR(pstate)).raw; -- cgit v1.2.3