| Age | Commit message (Expand) | Author |
|---|
| 2016-08-01 | soc/intel/quark: Enable use of hard reset | Lee Leahy |
| 2016-08-01 | soc/intel/common: Fix build error in reset.c | Lee Leahy |
| 2016-08-01 | Remove non-ascii & unprintable characters | Martin Roth |
| 2016-08-01 | Add newlines at the end of all coreboot files | Martin Roth |
| 2016-08-01 | arch/x86: Enable postcar console | Lee Leahy |
| 2016-08-01 | arch/x86: Display MTRRs after MTRR update in postcar | Lee Leahy |
| 2016-08-01 | siemens/sitemp_g1p1: Fix typo | Patrick Georgi |
| 2016-08-01 | soc/intel/common: Enable MTRR display during bootblock & postcar | Lee Leahy |
| 2016-08-01 | soc/intel/quark: Fix car_stage_entry routine name. | Lee Leahy |
| 2016-07-31 | mainboard/bap/ode_e20XX: Enable UART 3/4 in devicetree | Fabian Kunkel |
| 2016-07-31 | mainboard/bap/ode_e20XX: Add different DDR3 clk settings | Fabian Kunkel |
| 2016-07-31 | mainboard/bap/ode_e20XX: Change PCIe lines | Fabian Kunkel |
| 2016-07-31 | superio/nuvoton: Add Nuvoton NCT6791D | Omar Pakker |
| 2016-07-31 | src/vboot: Capitalize RAM and CPU | Elyes HAOUAS |
| 2016-07-31 | src/lib: Capitalize ROM, RAM, NVRAM and CPU | Elyes HAOUAS |
| 2016-07-31 | src/drivers: Capitalize CPU, RAM and ACPI | Elyes HAOUAS |
| 2016-07-31 | src/soc: Capitalize CPU, ACPI, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/acpi: Capitalize ACPI and SATA | Elyes HAOUAS |
| 2016-07-31 | sunw/ultra40m2: Fix handling non-existence of a device | Patrick Georgi |
| 2016-07-31 | sis/sis966: fix typo | Patrick Georgi |
| 2016-07-31 | sis/sis966: don't store a 32bit value in a 16bit variable | Patrick Georgi |
| 2016-07-31 | intel/broadwell: fix typo | Patrick Georgi |
| 2016-07-31 | intel/skylake: Enable signalling of error condition | Patrick Georgi |
| 2016-07-31 | google/reef: Update chromeos.fmd RO_SECTION | Furquan Shaikh |
| 2016-07-31 | intel/amenia: Enable DPTF in mainboard | Shaunak Saha |
| 2016-07-31 | google/reef: Enable DPTF in mainboard | Shaunak Saha |
| 2016-07-31 | gigabyte/ga_2761gxdk: Remove comment *endif* | Paul Menzel |
| 2016-07-31 | mainboard: Format irq_tables.c | Paul Menzel |
| 2016-07-31 | build system: really disable building CrEC when not needed | Patrick Georgi |
| 2016-07-31 | src/arch: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/Kconfig: Capitalize ROM | Elyes HAOUAS |
| 2016-07-31 | src/device: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
| 2016-07-31 | src/include: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/southbridge: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/northbridge: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
| 2016-07-31 | nvidia/tegra124: Adjust memlayout to Chrome OS toolchain | Stefan Reinauer |
| 2016-07-31 | google/gale: Change board ID definition. | Kan Yan |
| 2016-07-31 | Update degree symbol to utf-8 encoding in comments | Martin Roth |
| 2016-07-31 | Remove extra newlines from the end of all coreboot files. | Martin Roth |
| 2016-07-31 | intel/wifi: Include conditionally in the build | Kyösti Mälkki |
| 2016-07-30 | mainboard/bap/ode_e21XX: Add board support | Fabian Kunkel |
| 2016-07-30 | mainboard/bap/ode_e21XX: Add copy of amd/olivehillplus | Fabian Kunkel |
| 2016-07-30 | chromeos mainboards: remove chromeos.asl | Aaron Durbin |
| 2016-07-30 | google/reef: Use GPE0_DW1_15 as wake signal for touchpad | Furquan Shaikh |
| 2016-07-30 | soc/intel/apollolake: Include gpe.h in chip.h | Furquan Shaikh |
| 2016-07-29 | skylake: fix VSDIO is at 0.8V when SDCard is not inserted | Zhuo-hao.Lee |
| 2016-07-29 | soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume | Abhay Kumar |
| 2016-07-28 | google/gru & kevin: Update DRAM configuration | Lin Huang |
| 2016-07-28 | rockchip/rk3399: sdram: correct controller vref setting | Lin Huang |
| 2016-07-28 | drivers/intel/fsp2_0: Update the copyrights | Lee Leahy |
| 2016-07-28 | google/reef: Write protect GPIO relative to bank offset | Susendra Selvaraj |
| 2016-07-28 | soc/intel/apollolake: Update FSP Header files for version 146_30 | Brandon Breitenstein |
| 2016-07-28 | intel/apollolake: Update gnvs for dptf | Shaunak Saha |
| 2016-07-28 | intel/apollolake: Add soc specific DPTF values | Shaunak Saha |
| 2016-07-28 | intel/common: Add ASL code for DPTF | Shaunak Saha |
| 2016-07-28 | intel/common/opregion.c: only write 16 bytes to 16 byte field | Martin Roth |
| 2016-07-28 | arch/riscv: Refactor bootblock.S | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Only initialize virtual memory if it's available | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Remove spinlock code from atomic.h | Jonathan Neuschäfer |
| 2016-07-28 | intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init | Subrata Banik |
| 2016-07-28 | skylake/devicetree: Add LPC EC decode range | Subrata Banik |
| 2016-07-28 | skylake/mainboard: Define mainboard hook in bootblock | Subrata Banik |
| 2016-07-28 | soc/intel/skylake: Add C entry bootblock support | Subrata Banik |
| 2016-07-28 | soc/intel/skylake: Do cache as ram and prepare for C entry | Subrata Banik |
| 2016-07-28 | soc/intel/skylake: Use init_vbnv_cmos from vboot vbnv | Furquan Shaikh |
| 2016-07-28 | soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv | Furquan Shaikh |
| 2016-07-28 | chromeos/gnvs: Clean up use of vboot handoff | Furquan Shaikh |
| 2016-07-28 | chromeos: Clean up elog handling | Furquan Shaikh |
| 2016-07-28 | google/urara: Provide dummy implementations of rec/dev functions | Furquan Shaikh |
| 2016-07-28 | qualcomm/gale: Add required files to enable elog in ramstage | Furquan Shaikh |
| 2016-07-28 | qualcomm/storm: Add required files to enable elog in ramstage | Furquan Shaikh |
| 2016-07-28 | i2c/ww_ring: Add ww_ring files to ramstage | Furquan Shaikh |
| 2016-07-28 | google/chromeos: Use vboot bootmode functions for elog add boot reason | Furquan Shaikh |
| 2016-07-28 | bootmode: Get rid of CONFIG_BOOTMODE_STRAPS | Furquan Shaikh |
| 2016-07-28 | vboot: Separate vboot from chromeos | Furquan Shaikh |
| 2016-07-27 | drivers/intel/fsp2_0: Update MRC cache with dead version in recovery | Furquan Shaikh |
| 2016-07-27 | soc/intel/common: Store MRC data in next available slot in the cache | Furquan Shaikh |
| 2016-07-27 | mainboard/google/slippy: remove unobtainable mainboard | Aaron Durbin |
| 2016-07-27 | mainboard/google/bolt: remove unobtainable mainboard | Aaron Durbin |
| 2016-07-27 | soc/intel/apollolake: Disable monitor mwait | Bora Guvendik |
| 2016-07-27 | Rename VB_SOURCE to VBOOT_SOURCE for increased clarity | Paul Kocialkowski |
| 2016-07-27 | chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding path | Paul Kocialkowski |
| 2016-07-27 | arch/x86: Add bootblock and postcar support for SOC MTRR access | Lee Leahy |
| 2016-07-27 | cpu/x86: Support CPUs without rdmsr/wrmsr instructions | Lee Leahy |
| 2016-07-27 | nb/intel/x4x: Fix CAS latency detection and max memory detection | Damien Zammit |
| 2016-07-27 | device: include devicetree in bootblock stage | Aaron Durbin |
| 2016-07-27 | soc/nvidia/tegra124: remove cache_policiy option | Aaron Durbin |
| 2016-07-26 | drivers/intel/fsp2_0/header_util: Convert UPD headers | Lee Leahy |
| 2016-07-26 | google/oak: dsi: set mipi pin driving control on | Martin Roth |
| 2016-07-26 | meditek/mt8173: dsi: set mipi pin driving control on | Jitao Shi |
| 2016-07-26 | arch/x86: Generate a map file for the postcar stage | Lee Leahy |
| 2016-07-26 | arch/x86: Organize ramstage to match other stages | Lee Leahy |
| 2016-07-26 | arch/x86: Move romstage files into romstage section | Lee Leahy |
| 2016-07-26 | arch/x86: Move postcar stage commands into place | Lee Leahy |
| 2016-07-26 | drivers/elog: put back 4KiB limit | Aaron Durbin |
| 2016-07-26 | intel car: Use MTRR WRPROT type for XIP cache | Kyösti Mälkki |
| 2016-07-26 | intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE | Kyösti Mälkki |
| 2016-07-26 | lib: Don't require ULZMA compression for postcar | Lee Leahy |
