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authorFurquan Shaikh <furquan@google.com>2016-07-24 08:48:34 -0700
committerFurquan Shaikh <furquan@google.com>2016-07-27 23:53:13 +0200
commitaf8ef2a810f97b762d30de2b6f30d6ffefa0ae0e (patch)
tree7ba9d235d73d376d902684bb23bb3c2714f953b8 /src
parentc31973760f7dd3db2b149cb512b0a9dbb9ef45cc (diff)
drivers/intel/fsp2_0: Update MRC cache with dead version in recovery
If the system is in recovery, store the newly generated MRC data using a dummy version which is not legit. This ensures that on next normal boot, new MRC data will be generated and stored. BUG=chrome-os-partner:55699 Change-Id: Ib13e8c978dc1b4fc8817fab16d0e606f210f2586 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15828 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 8afa6d701c..004d7a8ffd 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -57,6 +57,13 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
printk(BIOS_ERR, "Failed to stash MRC data\n");
}
+/*
+ * On every trip to recovery, newly generated MRC data is stored with this
+ * version since it is not expected to be a legit version. This ensures that on
+ * next normal boot, memory re-training occurs and new MRC data is stored.
+ */
+#define MRC_DEAD_VERSION (0xdeaddead)
+
static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake,
uint32_t fsp_version)
{
@@ -86,6 +93,9 @@ static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake,
/* Now that CBMEM is up, save the list so ramstage can use it */
fsp_save_hob_list(hob_list_ptr);
+ if (recovery_mode_enabled())
+ fsp_version = MRC_DEAD_VERSION;
+
save_memory_training_data(s3wake, fsp_version);
/* Create romstage handof information */