coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-12-02	vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profile	Mike Banon
2020-06-01	AGESA f14/f15tn/f16kb: Clean up buildOpts.c files	Angel Pons
2020-05-26	AGESA f14/f15tn/f16kb: Factor out memory settings	Angel Pons
2020-05-26	AGESA f14/f15tn/f16kb: Factor out PCI MMIO base/size	Angel Pons
2020-05-26	AGESA f14: Factor out default MTRR settings	Angel Pons
2020-04-18	vc/amd/agesa/f14: Fix array length	Jacob Garber
2020-03-04	vc/amd/agesa/[...]/Config: Avoid out-of-bounds warnings	Joe Moore
2018-05-10	AGESA f14: Remove OPTION_DDR2	Kyösti Mälkki
2018-05-10	AGESA f14 vendorcode: Only have f14 Ontario config	Kyösti Mälkki
2018-05-06	AGESA f14: Remove early HT init	Kyösti Mälkki
2017-09-13	AGESA vendorcode: Remove AGESA_ENTRY_INIT_RECOVERY	Kyösti Mälkki
2017-09-13	AGESA vendorcode: Move PlatformInstall.h	Kyösti Mälkki