diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-21 15:14:07 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-26 11:46:21 +0000 |
| commit | 7e577ad22f2f7fb6e2fca062f87c93e1c1dc3344 (patch) | |
| tree | 6c0f03073cc094db0a0f5da292e9bb080e0a878e /src/vendorcode/amd/agesa/f14/Config | |
| parent | 5f82370d7bc4ba385ae8911cbfdabd4450f0e944 (diff) | |
AGESA f14/f15tn/f16kb: Factor out memory settings
We use the same values everywhere, so we might as well factor them out.
TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.
Change-Id: Ie6f166034d5d642dff37730a8d83264fb2e019b4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Config')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h b/src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h index 2de9de5b6e..883d509bca 100644 --- a/src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h +++ b/src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h @@ -583,7 +583,7 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE; #ifdef BLDCFG_VRM_SLEW_RATE #define CFG_VRM_SLEW_RATE BLDCFG_VRM_SLEW_RATE #else - #define CFG_VRM_SLEW_RATE DFLT_VRM_SLEW_RATE + #define CFG_VRM_SLEW_RATE (5000) #endif #ifdef BLDCFG_VRM_INRUSH_CURRENT_LIMIT @@ -613,7 +613,7 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE; #ifdef BLDCFG_VRM_NB_SLEW_RATE #define CFG_VRM_NB_SLEW_RATE BLDCFG_VRM_NB_SLEW_RATE #else - #define CFG_VRM_NB_SLEW_RATE DFLT_VRM_SLEW_RATE + #define CFG_VRM_NB_SLEW_RATE (5000) #endif #ifdef BLDCFG_VRM_NB_INRUSH_CURRENT_LIMIT @@ -722,7 +722,7 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE; #ifdef BLDCFG_MEMORY_QUADRANK_TYPE #define CFG_MEMORY_QUADRANK_TYPE BLDCFG_MEMORY_QUADRANK_TYPE #else - #define CFG_MEMORY_QUADRANK_TYPE DFLT_MEMORY_QUADRANK_TYPE + #define CFG_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED #endif #ifdef BLDCFG_MEMORY_RDIMM_CAPABLE @@ -848,31 +848,31 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE; #ifdef BLDCFG_SCRUB_DRAM_RATE #define CFG_SCRUB_DRAM_RATE BLDCFG_SCRUB_DRAM_RATE #else - #define CFG_SCRUB_DRAM_RATE DFLT_SCRUB_DRAM_RATE + #define CFG_SCRUB_DRAM_RATE (0) #endif #ifdef BLDCFG_SCRUB_L2_RATE #define CFG_SCRUB_L2_RATE BLDCFG_SCRUB_L2_RATE #else - #define CFG_SCRUB_L2_RATE DFLT_SCRUB_L2_RATE + #define CFG_SCRUB_L2_RATE (0) #endif #ifdef BLDCFG_SCRUB_L3_RATE #define CFG_SCRUB_L3_RATE BLDCFG_SCRUB_L3_RATE #else - #define CFG_SCRUB_L3_RATE DFLT_SCRUB_L3_RATE + #define CFG_SCRUB_L3_RATE (0) #endif #ifdef BLDCFG_SCRUB_IC_RATE #define CFG_SCRUB_IC_RATE BLDCFG_SCRUB_IC_RATE #else - #define CFG_SCRUB_IC_RATE DFLT_SCRUB_IC_RATE + #define CFG_SCRUB_IC_RATE (0) #endif #ifdef BLDCFG_SCRUB_DC_RATE #define CFG_SCRUB_DC_RATE BLDCFG_SCRUB_DC_RATE #else - #define CFG_SCRUB_DC_RATE DFLT_SCRUB_DC_RATE + #define CFG_SCRUB_DC_RATE (0) #endif #ifdef BLDCFG_ECC_SYNC_FLOOD |