summaryrefslogtreecommitdiff
path: root/src/southbridge
AgeCommit message (Expand)Author
2008-10-12Remove an extra bracket left by the vt8237r cleanup patch (trivial)Corey Osgood
2008-10-12VIA VT8237R cleanups (trivial).Uwe Hermann
2008-10-09Added comment about sb600 wideio setting for clarity and a minor witespace c...Marc Jones
2008-10-07[PATCH] coreboot: Don't loop forever waiting for HDA codecsJordan Crouse
2008-10-03Ron has been doing really good work over in v3. The problem is that the work ...Marc Jones
2008-10-02CK804 coding-style fixed based on an 'indent' run (trivial).Uwe Hermann
2008-10-02This is so that people can see it. This is the sb600 for v3. It almost Ronald G. Minnich
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
2008-09-22Patch for AMD SB600 chipset.Michael Xie
2008-09-22Patch for AMD RS690 chipset.Michael Xie
2008-09-19Attached patch fixes at least one issue ;) During the PCI BAR sizing must b...Rudolf Marek
2008-09-18ck804 whitespace fixesMyles Watson
2008-09-05This patch adds support for the VIA VT8237S south bridge. The VT8237R program...Rudolf Marek
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
2008-09-01This patch gets the Epia-CN working without ACPI or APIC.Bari Ari
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
2008-08-01coding style fixes (trivial)Stefan Reinauer
2008-07-12There was a programming error which made most USB port4 setup wrong. This pat...Marc Jones
2008-06-20Extend the VIA vt8237r southbridge decode range for the ROM to 1MB.Bari Ari
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
2008-05-06cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi...Marc Jones
2008-04-30By default, the Intel 3100 LPC interface enables only I/O range 0x3f8Ed Swierk
2008-04-23This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port onWard Vandewege
2008-04-06This patch halts the tco timer early in the boot process on all ICH series so...Joseph Smith
2008-04-01Setting an integrated southbridge device (like SATA or USB2.0) toEd Swierk
2008-04-01Remove i82801DB files that I meant to delete in r3206.Joseph Smith
2008-04-01Tiny style fix for consistency (trivial).Ed Swierk
2008-04-01Removal of i82801DB (ICH4)Joseph Smith
2008-04-01The early init code of several Intel southbridge chipsets callsEd Swierk
2008-03-30Like other Intel chipsets, the Intel 3100 has a TCO timer that rebootsEd Swierk
2008-03-29Now coreboot performs IRQ routing for some boards.Nikolay Petukhov
2008-03-20Following patch adds K8M890 support. It initializes the AGP and graphics UMA.Rudolf Marek
2008-03-19Following patch will setup KT890 HT automatically. It will find theRudolf Marek
2008-03-16Here is an updated patch addressing most of Uwe's and Peter's ...Ed Swierk
2008-03-15Following patch extends the ROM decoding to last 1MB, allowing to use largerRudolf Marek
2008-03-15Following patch fixes the retrain/reset sequence which caused problem with someRudolf Marek
2008-02-25This trivial patch removes an unused local variable, thus getting rid ofRonald Hoogenboom
2008-02-20Route device IRQ through PCI bridge instead in mptable.Yinghai Lu
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-12-19Additional early AMD8111 southbridge support for Barcelona platforms.Marc Jones
2007-11-30Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann
2007-11-29Restructure/rename/comment a few 82371XX-related PCI IDs (trivial).Uwe Hermann
2007-11-201. Fix pirq routing table setting for GA-2761GXDK.Morgan Tsai
2007-11-15Various cosmetic fixes and improvements (trivial).Uwe Hermann
2007-11-14* Maintaining SiS south bridge device IDs.Morgan Tsai
2007-11-13Add support for FID/VID changes messages.Rudolf Marek
2007-11-13Fine-tune the V-link bus between K8T890 and VT8237R and setRudolf Marek
2007-11-07Add initial support for all known ICH* southbridges to theUwe Hermann
2007-11-07This patch masks the function prototypes in stdlib.h from ROMCC, so thatCorey Osgood
2007-11-07Add PCI IDs for most Intel southbridges of the 82801 seriesUwe Hermann
2007-11-05* Change one PCI vendor ID from Nvidia to SiSCarl-Daniel Hailfinger
2007-11-04Various cosmetics, coding style fixes, constifications (trivial).Uwe Hermann
2007-11-04Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up toUwe Hermann
2007-11-03This patch is some small changes to the vt8237r to prepare it forCorey Osgood
2007-11-02remaining part of the patch.Stefan Reinauer
2007-11-02Delete a file no longer used by the SiS implementationJordan Crouse
2007-11-021. vgabios removed, will go to extra repositoryMorgan Tsai
2007-11-02trivial fix for the .data problemStefan Reinauer
2007-10-30Various fixes and improvements of the 82801xx code.Joseph Smith
2007-10-30Add support for the VIA VT8237R southbridge.Rudolf Marek
2007-10-30fix the readwrite/readonly clashes for the pci_driver structs in the sisStefan Reinauer
2007-10-29Thanks to the great efforts of Morgan Tsai of SiS we support the SiS966Morgan Tsai
2007-10-24smaller changes to silence build warnings. (trivial)Stefan Reinauer
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
2007-10-22This patch adds support for K8T890CE northbridge.Rudolf Marek
2007-10-07Fix some issues with spaces in the code and Doxygen style documentation.Juergen Beisert
2007-10-05This patch will add support for the Geode GX1/CS5530 VGA feature. It's ableJuergen Beisert
2007-10-01Thee lines in i82801xx_pci.c need to be removed. They cause theJoseph Smith
2007-09-25As per suggestion from Yinghai Lu <yinghailu@gmail.com> this patchUwe Hermann
2007-09-22Fix another, similar typo as in r2800 (trivial).Uwe Hermann
2007-09-22Fix typo which causes build error if CK804_USE_NIC is set (trivial).Uwe Hermann
2007-09-14More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.Yinghai Lu
2007-09-14This is a full rewrite of all the CS5530/CS5530A code. The previous code wasUwe Hermann
2007-06-19Various minor cosmetics and coding style fixes (trivial).Uwe Hermann
2007-06-19The GPIOs used for UART2 RX and TX were reversed.Marc Jones
2007-06-14Small bugfix in i82801xx_lpc.c.Corey Osgood
2007-06-14This patch adds support for the Intel i82810 northbridge and various i82801xxCorey Osgood
2007-06-03Intel 82371EB: Some code simplifications (trivial).Uwe Hermann
2007-06-02The UART disable code was causing a hang and was worked around with aMarc Jones
2007-05-29Intel 82371EB: Add IDE init support.Uwe Hermann
2007-05-27Init for the Intel 82371EB southbridge: make all ROM/BIOS regionsUwe Hermann
2007-05-24Drop the src/southbridge/amd/cs5536_lx directory and its contents, asUwe Hermann
2007-05-22Add missing license headers, minor cosmetic fixes in existing headers.Uwe Hermann
2007-05-10This fix properly hides the UDC and OTG PCI headers when the cs5536 isMarc Jones
2007-05-10This patch cleans up and clarifies Geode source code comments.Marc Jones
2007-05-10This patch updates the PCI ID of the Geode IDE device to include the revision.Marc Jones
2007-05-10Fix the indent and whitespace to match LinuxBIOS standardsJordan Crouse
2007-05-10Add missing licenses to several of the files.Jordan Crouse
2007-05-05With this patch, the msm800sev runs FILO and boots a kernel.Ronald G. Minnich
2007-05-04patch to fix the IDE configuration on EPIA boards. At some point thisBen Hewson
2007-05-04This patch re-implements support for the CS5536 companion chip for theMarc Jones
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
2007-04-07Fix epia-m build after u8/u16/u32 changes in Yh Lu's patch.Peter Stuge
2007-03-17Add initial pre-RAM serial output support for the VIA VT82C686(A/B)Corey Osgood
2007-02-19Fix some CHIP_NAME() entries to use canonical names.Uwe Hermann
2007-02-03Nvidia MCP55 uses CMD to send/receive bytes instead of DAT0, bxshi
2007-02-02I have Sun Ultra40 workstation. Southbridge is nVidia CrushK8-04/nforceRoman Kononov
2007-02-01This patch adds the MCP55 PCI IDs (without which the southbridge codeEd Swierk