diff options
| author | Marc Jones <marc.jones@amd.com> | 2007-05-10 23:22:27 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2007-05-10 23:22:27 +0000 |
| commit | ddf845f620eb43d9ea2e8b0b265c321c6e797e6f (patch) | |
| tree | ae8b74aa6ab4df81ec7061db6ab8c1cb941e8b58 /src/southbridge | |
| parent | 03625f4daf8bd92b8be64d795f8e46c01cc7468d (diff) | |
This patch cleans up and clarifies Geode source code comments.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536_early_setup.c | 8 |
2 files changed, 6 insertions, 8 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index afbec24a39..653323619b 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -131,14 +131,12 @@ static void pmChipsetInit(void) /* PM_SED */ port = (PMS_IO_BASE + 0x014); -/* mov eax, 0x057642 ; 100ms, works*/ - val = 0x04601; /* 5ms */ + val = 0x04601; /* 5ms, # of 3.57954MHz clock edges */ outl(val, port); /* PM_SIDD */ port = (PMS_IO_BASE + 0x020); -/* mov eax, 0x0AEC84 ; 200ms, works*/ - val = 0x08C02; /* 10ms */ + val = 0x08C02; /* 10ms, # of 3.57954MHz clock edges */ outl(val, port); } diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index d534bead90..d6ba089402 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -97,10 +97,10 @@ static void cs5536_setup_power_button(void) /* Power Button Setup */ outl(0x40020000, PMS_IO_BASE + 0x40); - /* setup GPIO24, it is the external signal for 5536 vsb_work_aux - * which controls all voltage rails except Vstandby & Vmem. + /* setup WORK_AUX/GPIO24, it is the external signal for 5536 + * vsb_work_aux controls all voltage rails except Vstandby & Vmem. * We need to enable, OUT_AUX1 and OUTPUT_ENABLE in this order. - * If GPIO24 is not enabled then soft-off will not work. + * If WORK_AUX/GPIO24 is not enabled then soft-off will not work. */ outl(GPIOH_24_SET, GPIO_IO_BASE + GPIOH_OUT_AUX1_SELECT); outl(GPIOH_24_SET, GPIO_IO_BASE + GPIOH_OUTPUT_ENABLE); @@ -127,7 +127,7 @@ static void cs5536_disable_internal_uart(void) { msr_t msr; /* The UARTs default to enabled. - * Disable and reset them and configure them later. (SIO init) + * Disable and reset them and configure them later. (SIO init) */ msr = rdmsr(MDD_UART1_CONF); msr.lo = 1; // reset |