summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/me_9.x.c
AgeCommit message (Expand)Author
2014-06-21intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki
2014-06-20southbridge/intel/lynxpoint/me_9.x.c: Use IS_ENABLED macroEdward O'Callaghan
2013-12-21lynxpoint: me: Disable some verbose messagesDuncan Laurie
2013-12-21lynxpoint: me: Support ICC clock enables messageDuncan Laurie
2013-12-21lynxpoint: me: Allow for more than MKHI MEI messagesDuncan Laurie
2013-12-21lynxpoint: Avoid any ME device communication in S3 pathDuncan Laurie
2013-12-21lynxpoint me: add support for mbp clear wait in finalize stepDuncan Laurie
2013-12-21Revert "lynxpoint: Move ME lock down to ramstage"Duncan Laurie
2013-11-25lynxpoint: Move ME lock down to ramstageDuncan Laurie
2013-11-25lynxpoint: Add missing ME MBP entriesDuncan Laurie
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21lynxpoint: update MBP give up routineAaron Durbin
2013-03-14haswell: more ULT/LP support and minor tweaksDuncan Laurie
2013-03-14lynxpoint: ME to BIOS Payload UpdatesAaron Durbin
2013-03-14haswell: remove explicit pcie config accessesAaron Durbin
2013-03-14lynxpoint: Management Engine UpdatesAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 11:43:03 +0000