coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-04	sb/intel/i82801gx: Use PCI bitwise ops	Angel Pons
2020-07-24	sb/intel/*: Delete invalid comment	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-02-26	treewide: capitalize 'USB'	Elyes HAOUAS
2020-01-14	sb/intel/common: Declare common smbus_base() and enable_smbus()	Kyösti Mälkki
2020-01-14	intel/{i945,pineview},i82801gx: Move enable_smbus() call	Kyösti Mälkki
2019-11-14	sb/intel/i82801gx: Don't setup CIR when the northbridge is x4x	Arthur Heymans
2019-11-14	sb/intel/i82801gx: Add common early code	Arthur Heymans
2019-11-13	sb/intel/i82801gx: Add a function to set up BAR	Arthur Heymans
2019-11-12	sb/intel/i82801gx: Add common LPC decode code	Arthur Heymans