| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-11-19 | northbridge/intel/fsp_*: Remove legacy SoCs | zaolin |
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-10-23 | src: Remove unneeded whitespace | Elyes HAOUAS |
| 2018-10-22 | intel: Use CF9 reset (part 1) | Patrick Rudolph |
| 2018-05-24 | sb/intel/fsp_i89xx: Get rid of device_t | Elyes HAOUAS |
| 2017-07-31 | sb/intel/fspi89xx: Fix timestamp code | Martin Roth |
| 2017-07-16 | southbridge/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-01-12 | fsp 1.0 systems: Check for NULL when saving HobListPtr | Martin Roth |
| 2016-08-31 | src/southbridge: Code formating | Elyes HAOUAS |
| 2016-07-31 | Remove extra newlines from the end of all coreboot files. | Martin Roth |
| 2016-07-21 | timestamp: Drop duplicate TS_END_ROMSTAGE entries | Kyösti Mälkki |
| 2016-06-29 | intel romstage: Use run_ramstage() | Kyösti Mälkki |
| 2016-01-13 | tree: drop last paragraph of GPL copyright header from new files | Martin Roth |
| 2015-11-10 | southbridge/intel: Add FSP based i89xx southbridge support | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |