index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
intel
/
bd82x6x
/
pch.h
Age
Commit message (
Expand
)
Author
2020-01-14
sb/intel/common: Declare common smbus_base() and enable_smbus()
Kyösti Mälkki
2020-01-09
sb/intel/common: Add smbus_set_slave_addr()
Kyösti Mälkki
2019-12-14
sb/intel/*: Remove romcc guards
Arthur Heymans
2019-11-18
sb/intel/bd82x6x: Make the pch_enable_lpc hook optional
Arthur Heymans
2019-11-18
nb/intel/sandybridge: Make the mainboard_rcba_config hook optional
Arthur Heymans
2019-10-30
src/southbridge: change "unsigned" to "unsigned int"
Martin Roth
2019-10-01
intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL
Kyösti Mälkki
2019-09-30
sb/intel/bd82x6x: Use common final SPI OPs setup
Arthur Heymans
2019-08-21
southbridge/intel: Tidy up preprocessor and headers
Kyösti Mälkki
2019-07-18
sb/intel/bd82x6x: Add and use more RCBA defines
Patrick Rudolph
2019-05-29
sb/intel/*: Delete early_spi
Patrick Rudolph
2019-05-16
nb/intel/sandybridge: Move DMI init code
Patrick Rudolph
2019-05-16
sb/intel/sandybridge/early_pch: Make DMI init more readable
Patrick Rudolph
2019-04-18
nb/intel/sandybridge: Move southbridge code to bd82x6x
Patrick Rudolph
2019-04-16
sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Patrick Rudolph
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-01-14
sb/intel: Use common RCBA MACROs
Peter Lemenkov
2018-12-29
sb/intel/bd828x6x: Make CONFIG_ELOG=y compile
Arthur Heymans
2018-12-03
sb/intel/common: Create a common PCH finalise implementation
Tristan Corrick
2018-11-07
sb/intel: Deduplicate vbnv_cmos_failed and rtc_init
Patrick Rudolph
2018-10-18
mb/lenovo/*/romstage: Use macros instead of magic numbers
Peter Lemenkov
2018-09-21
sb/intel/bd82x6x: Don't use device_t
Elyes HAOUAS
2018-07-28
sb/intel/bd82x6x: Fix watchdog
Patrick Rudolph
2018-06-21
sb/intel/common: Make RCBA manipulation MACROs common
Arthur Heymans
2018-06-21
Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"
Arthur Heymans
2018-05-24
src: Remove space after `defined`
Elyes HAOUAS
2018-04-11
Revert "model_206ax: Use parallel MP init"
Arthur Heymans
2018-04-11
model_206ax: Use parallel MP init
Arthur Heymans
2018-03-28
sb/intel/common: Add common code for SMM setup and smihandler
Arthur Heymans
2018-02-27
sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location
Arthur Heymans
2018-01-23
sb/intel/bd82x6x: Reduce function-disable mess
Nico Huber
2017-12-07
intel/bd82x6x: Fix a small mistake in DIR_ROUTE
Tobias Diedrich
2017-09-20
southbridge/intel/bd82x6x: refactor rtc failure checking
Aaron Durbin
2017-08-06
sb/intel/*: Use common SMBus functions
Arthur Heymans
2017-07-16
southbridge/intel: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2017-06-02
sb/intel/bd82x6x/early_usb: Use register name
Patrick Rudolph
2017-05-21
sb/intel/bd82x6x/finalize: Lock ETR3 CF9GR
Patrick Rudolph
2017-05-05
sb/intel/bd82x6x/finalize: Use register name
Patrick Rudolph
2016-12-08
sb/intel/bd82x6x: Add TCO_Lock in finalize step
Dennis Wassenberg
2016-09-04
southbridge/intel/bd82x6x: transition away from device_t
Antonello Dettori
2016-07-30
chromeos mainboards: remove chromeos.asl
Aaron Durbin
2016-07-15
southbridge/intel/bd82x6x: use common Intel ACPI hardware definitions
Aaron Durbin
2016-02-18
southbridge/intel/bd82x6x: Use common gpio.c
Patrick Rudolph
2015-11-04
sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETs
Nico Huber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-09
Create i945-ivy smm tseg init based on ivy code.
Vladimir Serbinenko
2015-05-28
Migrate 206ax to SMM_MODULES
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-28
intel SMI handlers: Refactor GPI SMI/SCI routing
Kyösti Mälkki
2015-04-20
southbrige/intel/bd82x6x: add XHCI overcurrent map config
Nicolas Reinecke
2015-04-19
southbrige/intel/bd82x6x: XHCI replace magic values
Nicolas Reinecke
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2015-01-31
southbridge/intel/bd82x6x native usb init: replace some magic values
Nicolas Reinecke
2014-11-23
sandy/ivy/nehalem: Remerge interrupt handling
Vladimir Serbinenko
2014-10-24
sandy/ivy native: dedup romstage.c main()
Vladimir Serbinenko
2014-10-17
bd82x6x: Consolidate early native USB init
Vladimir Serbinenko
2014-10-16
bd82x6x: Move common bd82x6x S3 detect to bd82x6x code.
Vladimir Serbinenko
2014-07-29
sandy/ivybridge: Native raminit.
Vladimir Serbinenko
2013-06-03
Intel BD82x6x: LPC: Unify I/O APIC setup
Paul Menzel
2013-05-10
Drop prototype guarding for romcc
Stefan Reinauer
2013-03-17
Add bd82x6x PCH functions to SMM
Marc Jones
2013-03-09
Add Intel Panther Point USB3 initialization
Marc Jones
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-12
SPI: Add early romstage SPI driver using hardware sequencing
Duncan Laurie
2012-11-12
SPI: Add Fast Read to the OPMENU for locked down SPI
Duncan Laurie
2012-11-09
PCH: Add register descriptions used by IGD OpRegion
Stefan Reinauer
2012-10-08
hpet: common ACPI generation
Patrick Georgi
2012-08-04
Perform additional programming requirements for SATA
Stefan Reinauer
2012-07-26
SATA: Add option to configure gen3 transmitter
Duncan Laurie
2012-07-25
ELOG: Log boot-time events found in southbridge
Duncan Laurie
2012-07-24
CPU: Set flex ratio to nominal TDP ratio in bootblock
Duncan Laurie
2012-05-01
Add an option to enable PCIe root port coalescing
Duncan Laurie
2012-04-04
Add support for Intel Panther Point PCH
Stefan Reinauer